MAJOR=4 MINOR=6 DEVNAME=tty6 7  M_I|Mdv &K Index of /anon_sym/anon/sys/dev/char/4:60/subsystem/tty12

Index of /anon_sym/anon/sys/dev/char/4:60/subsystem/tty12

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 dev 2026-10-12 03:03 4.0K 
 power/ 2026-10-12 02:50 -  
 subsystem/ 2026-10-11 21:02 -  
 uevent 2026-10-12 03:02 4.0K 
l4( (  fB- 0ȿFile not found.  N_I|+9/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2014 Samsung Electronics Co., Ltd. * Author: Rahul Sharma * * Provides Constants for Exynos5260 clocks. */ #ifndef _DT_BINDINGS_CLK_EXYNOS5260_H #define _DT_BINDINGS_CLK_EXYNOS5260_H /* Clock names: */ /* List Of Clocks For CMU_TOP */ #define TOP_FOUT_DISP_PLL 1 #define TOP_FOUT_AUD_PLL 2 #define TOP_MOUT_AUDTOP_PLL_USER 3 #define TOP_MOUT_AUD_PLL 4 #define TOP_MOUT_DISP_PLL 5 #define TOP_MOUT_BUSTOP_PLL_USER 6 #define TOP_MOUT_MEMTOP_PLL_USER 7 #define TOP_MOUT_MEDIATOP_PLL_USER 8 #define TOP_MOUT_DISP_DISP_333 9 #define TOP_MOUT_ACLK_DISP_333 10 #define TOP_MOUT_DISP_DISP_222 11 #define TOP_MOUT_ACLK_DISP_222 12 #define TOP_MOUT_DISP_MEDIA_PIXEL 13 #define TOP_MOUT_FIMD1 14 #define TOP_MOUT_SCLK_PERI_SPI0_CLK 15 #define TOP_MOUT_SCLK_PERI_SPI1_CLK 16 #define TOP_MOUT_SCLK_PERI_SPI2_CLK 17 #define TOP_MOUT_SCLK_PERI_UART0_UCLK 18 #define TOP_MOUT_SCLK_PERI_UART2_UCLK 19 #define TOP_MOUT_SCLK_PERI_UART1_UCLK 20 #define TOP_MOUT_BUS4_BUSTOP_100 21 #define TOP_MOUT_BUS4_BUSTOP_400 22 #define TOP_MOUT_BUS3_BUSTOP_100 23 #define TOP_MOUT_BUS3_BUSTOP_400 24 #define TOP_MOUT_BUS2_BUSTOP_400 25 #define TOP_MOUT_BUS2_BUSTOP_100 26 #define TOP_MOUT_BUS1_BUSTOP_100 27 #define TOP_MOUT_BUS1_BUSTOP_400 28 #define TOP_MOUT_SCLK_FSYS_USB 29 #define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_A 30 #define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_A 31 #define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_A 32 #define TOP_MOUT_SCLK_FSYS_MMC0_SDCLKIN_B 33 #define TOP_MOUT_SCLK_FSYS_MMC1_SDCLKIN_B 34 #define TOP_MOUT_SCLK_FSYS_MMC2_SDCLKIN_B 35 #define TOP_MOUT_ACLK_ISP1_266 36 #define TOP_MOUT_ISP1_MEDIA_266 37 #define TOP_MOUT_ACLK_ISP1_400 38 #define TOP_MOUT_ISP1_MEDIA_400 39 #define TOP_MOUT_SCLK_ISP1_SPI0 40 #define TOP_MOUT_SCLK_ISP1_SPI1 41 #define TOP_MOUT_SCLK_ISP1_UART 42 #define TOP_MOUT_SCLK_ISP1_SENSOR2 43 #define TOP_MOUT_SCLK_ISP1_SENSOR1 44 #define TOP_MOUT_SCLK_ISP1_SENSOR0 45 #define TOP_MOUT_ACLK_MFC_333 46 #define TOP_MOUT_MFC_BUSTOP_333 47 #define TOP_MOUT_ACLK_G2D_333 48 #define TOP_MOUT_G2D_BUSTOP_333 49 #define TOP_MOUT_ACLK_GSCL_FIMC 50 #define TOP_MOUT_GSCL_BUSTOP_FIMC 51 #define TOP_MOUT_ACLK_GSCL_333 52 #define TOP_MOUT_GSCL_BUSTOP_333 53 #define TOP_MOUT_ACLK_GSCL_400