MAJOR=4
MINOR=8
DEVNAME=tty8
     	ˆÉÈ„eÐ>ÿÇÆÅ  
   ˆƒ™s¾ÆÅ ?÷     	/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * DA9150 MFD Driver - Registers
 *
 * Copyright (c) 2014 Dialog Semiconductor
 *
 * Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
 */

#ifndef __DA9150_REGISTERS_H
#define __DA9150_REGISTERS_H

#include <linux/bitops.h>

/* Registers */
#define DA9150_PAGE_CON			0x000
#define DA9150_STATUS_A			0x068
#define DA9150_STATUS_B			0x069
#define DA9150_STATUS_C			0x06A
#define DA9150_STATUS_D			0x06B
#define DA9150_STATUS_E			0x06C
#define DA9150_STATUS_F			0x06D
#define DA9150_STATUS_G			0x06E
#define DA9150_STATUS_H			0x06F
#define DA9150_STATUS_I			0x070
#define DA9150_STATUS_J			0x071
#define DA9150_STATUS_K			0x072
#define DA9150_STATUS_L			0x073
#define DA9150_STATUS_N			0x074
#define DA9150_FAULT_LOG_A		0x076
#define DA9150_FAULT_LOG_B		0x077
#define DA9150_EVENT_E			0x078
#define DA9150_EVENT_F			0x079
#define DA9150_EVENT_G			0x07A
#define DA9150_EVENT_H			0x07B
#define DA9150_IRQ_MASK_E		0x07C
#define DA9150_IRQ_MASK_F		0x07D
#define DA9150_IRQ_MASK_G		0x07E
#define DA9150_IRQ_MASK_H		0x07F
#define DA9150_PAGE_CON_1		0x080
#define DA9150_CONFIG_A			0x0E0
#define DA9150_CONFIG_B			0x0E1
#define DA9150_CONFIG_C			0x0E2
#define DA9150_CONFIG_D			0x0E3
#define DA9150_CONFIG_E			0x0E4
#define DA9150_CONTROL_A		0x0E5
#define DA9150_CONTROL_B		0x0E6
#define DA9150_CONTROL_C		0x0E7
#define DA9150_GPIO_A_B			0x0E8
#define DA9150_GPIO_C_D			0x0E9
#define DA9150_GPIO_MODE_CONT		0x0EA
#define DA9150_GPIO_CTRL_B		0x0EB
#define DA9150_GPIO_CTRL_A		0x0EC
#define DA9150_GPIO_CTRL_C		0x0ED
#define DA9150_GPIO_CFG_A		0x0EE
#define DA9150_GPIO_CFG_B		0x0EF
#define DA9150_GPIO_CFG_C		0x0F0
#define DA9150_GPADC_MAN		0x0F2
#define DA9150_GPADC_RES_A		0x0F4
#define DA9150_GPADC_RES_B		0x0F5
#define DA9150_PAGE_CON_2		0x100
#define DA9150_OTP_CONT_SHARED		0x101
#define DA9150_INTERFACE_SHARED		0x105
#define DA9150_CONFIG_A_SHARED		0x106
#define DA9150_CONFIG_D_SHARED		0x109
#define DA9150_ADETVB_CFG_C		0x150
#define DA9150_ADETD_STAT		0x151
#define DA9150_ADET_CMPSTAT		0x152
#define DA9150_ADET_CTRL_A		0x153
#define DA9150_ADETVB_CFG_B		0x154
#define DA9150_ADETVB_CFG_A		0x155
#define DA9150_ADETAC_CFG_A		0x156
#define DA9150_ADDETAC_CFG_B		0x157
#define DA9150_ADETAC_CFG_C		0x158
#define DA9150_ADETAC_CFG_D		0x159
#define DA9150_ADETVB_CFG_D		0x15A
#define DA9150_ADETID_CFG_A		0x15B
#define DA9150_ADET_RID_PT_CHG_H	0x15C
#define DA9150_ADET_RID_PT_CHG_L	0x15D
#define DA9150_PPR_TCTR_B		0x160
#define DA9150_PPR_BKCTRL_A		0x163
#define DA9150_PPR_BKCFG_A		0x164
#define DA9150_PPR_BKCFG_B		0x165
#define DA9150_PPR_CHGCTRL_A		0x166
#define DA9150_PPR_CHGCTRL_B		0x167
#define DA9150_PPR_CHGCTRL_C		0x168
#define DA9150_PPR_TCTR_A		0x169
#define DA9150_PPR_CHGCTRL_D		0x16A
#define DA9150_PPR_CHGCTRL_E		0x16B
#define DA9150_PPR_CHGCTRL_F		0x16C
#define DA9150_PPR_CHGCTRL_G		0x16D
#define DA9150_PPR_CHGCTRL_H		0x16E
#define DA9150_PPR_CHGCTRL_I		0x16F
#define DA9150_PPR_CHGCTRL_J		0x170
#define DA9150_PPR_CHGCTRL_K		0x171
#define DA9150_PPR_CHGCTRL_L		0x172
#define DA9150_PPR_CHGCTRL_M		0x173
#define DA9150_PPR_THYST_A		0x174
#define DA9150_PPR_THYST_B		0x175
#define DA9150_PPR_THYST_C		0x176
#define DA9150_PPR_THYST_D		0x177
#define DA9150_PPR_THYST_E		0x178
#define DA9150_PPR_THYST_F		0x179
#define DA9150_PPR_THYST_G		0x17A
#define DA9150_PAGE_CON_3		0x180
#define DA9150_PAGE_CON_4		0x200
#define DA9150_PAGE_CON_5		0x280
#define DA9150_PAGE_CON_6		0x300
#define DA9150_COREBTLD_STAT_A		0x302
#define DA9150_COREBTLD_CTRL_A		0x303
#define DA9150_CORE_CONFIG_A		0x304
#define DA9150_CORE_CONFIG_C		0x305
#define DA9150_CORE_CONFIG_B		0x306
#define DA9150_CORE_CFG_DATA_A		0x307
#define DA9150_CORE_CFG_DATA_B		0x308
#define DA9150_CORE_CMD_A		0x309
#define DA9150_CORE_DATA_A		0x30A
#define DA9150_CORE_DATA_B		0x30B
#define DA9150_CORE_DATA_C		0x30C
#define DA9150_CORE_DATA_D		0x30D
#define DA9150_CORE2WIRE_STAT_A		0x310
#define DA9150_CORE2WIRE_CTRL_A		0x311
#define DA9150_FW_CTRL_A		0x312
#define DA9150_FW_CTRL_C