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Index of /configAHR/Jump/0-coastlinecompg/FSS-OZR/root/sys/module/tpm_tis
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Index of /FSS-OZR/root/sys/bus/acpi/devices/device:03/subsystem/drivers/hpet
Index of /FSS-OZR/root/sys/bus/acpi/devices/device:03/subsystem/drivers/hpet
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ƒÍ9_†I|¥�+Àà 6 /* SPDX-License-Identifier: GPL-2.0+
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* Copyright (C) 2016 Renesas Electronics Corp.
*/
#ifndef __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
#define __DT_BINDINGS_CLOCK_R8A7796_CPG_MSSR_H__
#include
/* r8a7796 CPG Core Clocks */
#define R8A7796_CLK_Z 0
#define R8A7796_CLK_Z2 1
#define R8A7796_CLK_ZR 2
#define R8A7796_CLK_ZG 3
#define R8A7796_CLK_ZTR 4
#define R8A7796_CLK_ZTRD2 5
#define R8A7796_CLK_ZT 6
#define R8A7796_CLK_ZX 7
#define R8A7796_CLK_S0D1 8
#define R8A7796_CLK_S0D2 9
#define R8A7796_CLK_S0D3 10
#define R8A7796_CLK_S0D4 11
#define R8A7796_CLK_S0D6 12
#define R8A7796_CLK_S0D8 13
#define R8A7796_CLK_S0D12 14
#define R8A7796_CLK_S1D1 15
#define R8A7796_CLK_S1D2 16
#define R8A7796_CLK_S1D4 17
#define R8A7796_CLK_S2D1 18
#define R8A7796_CLK_S2D2 19
#define R8A7796_CLK_S2D4 20
#define R8A7796_CLK_S3D1 21
#define R8A7796_CLK_S3D2 22
#define R8A7796_CLK_S3D4 23
#define R8A7796_CLK_LB 24
#define R8A7796_CLK_CL 25
#define R8A7796_CLK_ZB3 26
#define R8A7796_CLK_ZB3D2 27
#define R8A7796_CLK_ZB3D4 28
#define R8A7796_CLK_CR 29
#define R8A7796_CLK_CRD2 30
#define R8A7796_CLK_SD0H 31
#define R8A7796_CLK_SD0 32
#define R8A7796_CLK_SD1H 33
#define R8A7796_CLK_SD1 34
#define R8A7