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      ˆl–Ü4ý( ©³( 	Å€fàB¦-ÿÂ0ÁÀ     ˆ¾ÂƒŒ³_†I|¥+ÂÁ a    /*
 * Copyright (c) 2015 Vladimir Zapolskiy <vz@mleia.com>
 *
 * This code is released using a dual license strategy: BSD/GPL
 * You can choose the licence that better fits your requirements.
 *
 * Released under the terms of 3-clause BSD License
 * Released under the terms of GNU General Public License Version 2.0
 *
 */

#ifndef __DT_BINDINGS_LPC32XX_CLOCK_H
#define __DT_BINDINGS_LPC32XX_CLOCK_H

/* LPC32XX System Control Block clocks */
#define LPC32XX_CLK_RTC		1
#define LPC32XX_CLK_DMA		2
#define LPC32XX_CLK_MLC		3
#define LPC32XX_CLK_SLC		4
#define LPC32XX_CLK_LCD		5
#define LPC32XX_CLK_MAC		6
#define LPC32XX_CLK_SD		7
#define LPC32XX_CLK_DDRAM	8
#define LPC32XX_CLK_SSP0	9
#define LPC32XX_CLK_SSP1	10
#define LPC32XX_CLK_UART3	11
#define LPC32XX_CLK_UART4	12
#define LPC32XX_CLK_UART5	13
#define LPC32XX_CLK_UART6	14
#define LPC32XX_CLK_IRDA	15
#define LPC32XX_CLK_I2C1	16
#define LPC32XX_CLK_I2C2	17
#define LPC32XX_CLK_TIMER0	18
#define LPC32XX_CLK_TIMER1	19
#define LPC32XX_CLK_TIMER2	20
#define LPC32XX_CLK_TIMER3	21
#define LPC32XX_CLK_TIMER4	22
#define LPC32XX_CLK_TIMER5	23
#define LPC32XX_CLK_WDOG	24
#define LPC32XX_CLK_I2S0	25
#define LPC32XX_CLK_I2S1	26
#define LPC32XX_CLK_SPI1	27
#define LPC32XX_CLK_SPI2	28
#define LPC32XX_CLK_MCPWM	29
#define LPC32XX_CLK_HSTIMER	30
#define LPC32XX_CLK_KEY		31
#define LPC32XX_CLK_PWM1	32
#define LPC32XX_CLK_PWM2	33
#define LPC32XX_CLK_ADC		34
#define LPC32XX_CLK_HCLK_PLL	35
#define LPC32XX_CLK_PERIPH	36

/* LPC32XX USB clocks */
#define LPC32XX_USB_CLK_I2C	1
#define LPC32XX_USB_CLK_DEVICE	2
#define LPC32XX_USB_CLK_HOST	3

#endif /* __DT_BINDINGS_LPC32XX_CLOCK_H */
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     ˆÀÄƒeñ¿ÃÂ P    /* SPDX-License-Identifier: GPL-2.0-only */
/*
 * net busy poll support
 * Copyright(c) 2013 Intel Corporation.
 *
 * Author: Eliezer Tamir
 *
 * Contact Information:
 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 */

#ifndef _LINUX_NET_BUSY_POLL_H
#define _LINUX_NET_BUSY_POLL_H

#include <linux/netdevice.h>
#include <linux/sched/clock.h>
#include <linux/sched/signal.h>
#include <net/ip.h>

/*		0 - Reserved to indicate value not set
 *     1..NR_CPUS - Reserved for sender_cpu
 *  NR_CPUS+1..~0 - Region available for NAPI IDs
 */
#define MIN_NAPI_ID ((unsigned int)(NR_CPUS + 1))

#define BUSY_POLL_BUDGET 8

#ifdef CONFIG_NET_RX_BUSY_POLL

struct napi_struct;
extern unsigned int sysctl_net_busy_read __read_mostly;
extern unsigned int sysctl_net_busy_poll __read_mostly;

static inline bool net_busy_loop_on(void)
{
	return READ_ONCE(sysctl_net_busy_poll);
}

static inline bool sk_can_busy_loop(const struct sock *sk)
{
	return READ_ONCE(sk->sk_ll_usec) && !signal_pending(current);
}

bool sk_busy_loop_end(void *p, unsigned long start_time);

void napi_busy_loop(unsigned int napi_id,
		    bool (*loop_end)(void *, unsigned long),
		    void *loop_end_arg, bool prefer_busy_poll, u16 budget);

void napi_busy_loop_rcu(unsigned int napi_id,
			bool (*loop_end)(void *, unsigned long),
			void *loop_end_arg, bool prefer_busy_poll, u16 budget);

#else /* CONFIG_NET_RX_BUSY_POLL */
static inline unsigned long net_busy_loop_on(void)
{
	return 0;
}

static inline bool sk_can_busy_loop(struct sock *sk)
{
	return false;
}

#endif /* CONFIG_NET_RX_BUSY_POLL */

static inline unsigned long busy_loop_current_time(void)
{
#ifdef CONFIG_NET_RX_BUSY_POLL
	return (unsigned long)(ktime_get_ns() >> 10);
#else
	return 0;
#endif
}

/* in poll/select we use the global sysctl_net_ll_poll value */
static inline bool busy_loop_timeout(unsigned long start_time)
{
#ifdef CONFIG_NET_RX_BUSY_POLL
	unsigned long bp_usec = READ_ONCE(sysctl_net_busy_poll);

	if (bp_usec) {
		unsigned long end_time = start_time + bp_usec;
		unsigned long now = busy_loop_current_time();

		return time_after(now, end_time);
	}
#endif
	return true;
}

static inline bool sk_busy_loop_timeout(struct sock *sk,
					unsigned long start_time)
{
#ifdef