0  _I|Mdv &K Index of /anon_sym/anon/opt/cpanel/ea-libxml2/bin

Index of /anon_sym/anon/opt/cpanel/ea-libxml2/bin

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 xmlcatalog 2026-05-18 12:04 32K 
 xmllint 2026-05-18 12:04 111K 
"lm_J*j"TzOe1h hauto  l4( (  fB- 0    Index of /FSS-OZR/root/sys/dev/char/4:38/subsystem/tty36/power

Index of /FSS-OZR/root/sys/dev/char/4:38/subsystem/tty36/power

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 runtime_suspended_time 2026-10-11 14:10 4.0K 
  d-_I|+ Q /* SPDX-License-Identifier: GPL-2.0-only */ /* * ARConnect IP Support (Multi core enabler: Cross core IPI, RTC ...) * * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com) */ #ifndef __SOC_ARC_MCIP_H #define __SOC_ARC_MCIP_H #include #define ARC_REG_MCIP_BCR 0x0d0 #define ARC_REG_MCIP_IDU_BCR 0x0D5 #define ARC_REG_GFRC_BUILD 0x0D6 #define ARC_REG_MCIP_CMD 0x600 #define ARC_REG_MCIP_WDATA 0x601 #define ARC_REG_MCIP_READBACK 0x602 struct mcip_cmd { #ifdef CONFIG_CPU_BIG_ENDIAN unsigned int pad:8, param:16, cmd:8; #else unsigned int cmd:8, param:16, pad:8; #endif #define CMD_INTRPT_GENERATE_IRQ 0x01 #define CMD_INTRPT_GENERATE_ACK 0x02 #define CMD_INTRPT_READ_STATUS 0x03 #define CMD_INTRPT_CHECK_SOURCE 0x04 /* Semaphore Commands */ #define CMD_SEMA_CLAIM_AND_READ 0x11 #define CMD_SEMA_RELEASE 0x12 #define CMD_DEBUG_SET_MASK 0x34 #define CMD_DEBUG_READ_MASK 0x35