MAJOR=4 MINOR=6 DEVNAME=tty6  932 Index of /FSS-OZR/root/usr/share/licenses/perl-HTML-Template

Index of /FSS-OZR/root/usr/share/licenses/perl-HTML-Template

 NameLast modifiedSizeDescription
 Parent Directory   -  
 LICENSE 2017-05-18 16:28 18K 
l=J 2BP@n1h 0   Index of /configAHR/Jump/0-coastlinecompg/anon_sym/anon/sys/dev/char/4:38/subsystem/tty19/power

Index of /configAHR/Jump/0-coastlinecompg/anon_sym/anon/sys/dev/char/4:38/subsystem/tty19/power

 NameLast modifiedSizeDescription
 Parent Directory   -  
 autosuspend_delay_ms 2026-10-12 03:07 4.0K 
 control 2026-10-12 03:07 4.0K 
 runtime_active_time 2026-10-12 03:07 4.0K 
 runtime_status 2026-10-12 03:07 4.0K 
 runtime_suspended_time 2026-10-12 03:07 4.0K 
+l4( (  fB- i6_I|+?/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * ATI Mach64 Register Definitions * * Copyright (C) 1997 Michael AK Tesch * written with much help from Jon Howell * * Updated for 3D RAGE PRO and 3D RAGE Mobility by Geert Uytterhoeven */ /* * most of the rest of this file comes from ATI sample code */ #ifndef REGMACH64_H #define REGMACH64_H /* NON-GUI MEMORY MAPPED Registers - expressed in BYTE offsets */ /* Accelerator CRTC */ #define CRTC_H_TOTAL_DISP 0x0000 /* Dword offset 0_00 */ #define CRTC2_H_TOTAL_DISP 0x0000 /* Dword offset 0_00 */ #define CRTC_H_SYNC_STRT_WID 0x0004 /* Dword offset 0_01 */ #define CRTC2_H_SYNC_STRT_WID 0x0004 /* Dword offset 0_01 */ #define CRTC_H_SYNC_STRT 0x0004 #define CRTC2_H_SYNC_STRT 0x0004 #define CRTC_H_SYNC_DLY 0x0005 #define CRTC2_H_SYNC_DLY 0x0005 #define CRTC_H_SYNC_WID 0x0006 #define CRTC2_H_SYNC_WID 0x0006 #define CRTC_V_TOTAL_DISP 0x0008 /* Dword offset 0_02 */ #define CRTC2_V_TOTAL_DISP 0x0008 /* Dword offset 0_02 */ #define CRTC_V_TOTAL 0x0008 #define CRTC2_V_TOTAL 0x0008 #define CRTC_V_DISP 0x000A #define CRTC2_V_DISP 0x000A #define CRTC_V_SYNC_STRT_WID 0x000C /* Dword offset 0_03 */ #define CRTC2