3 ?ai~ *j"TjBȔţ?File not found. A оDA/* SPDX-License-Identifier: GPL-2.0+ */ /* * Copyright (C) 2019 Sean Anderson * Copyright (c) 2020 Western Digital Corporation or its affiliates. */ #ifndef RESET_K210_SYSCTL_H #define RESET_K210_SYSCTL_H /* * Kendryte K210 SoC system controller K210_SYSCTL_SOFT_RESET register bits. * Taken from Kendryte SDK (kendryte-standalone-sdk). */ #define K210_RST_ROM 0 #define K210_RST_DMA 1 #define K210_RST_AI 2 #define K210_RST_DVP 3 #define K210_RST_FFT 4 #define K210_RST_GPIO 5 #define K210_RST_SPI0 6 #define K210_RST_SPI1 7 #define K210_RST_SPI2 8 #define K210_RST_SPI3 9 #define K210_RST_I2S0 10 #define K210_RST_I2S1 11 #define K210_RST_I2S2 12 #define K210_RST_I2C0 13 #define K210_RST_I2C1 14 #define K210_RST_I2C2 15 #define K210_RST_UART1 16 #define K210_RST_UART2 17 #define K210_RST_UART3 18 #define K210_RST_AES 19 #define K210_RST_FPIOA 20 #define K210_RST_TIMER0 21 #define K210_RST_TIMER1 22 #define K210_RST_TIMER2 23 #define K210_RST_WDT0 24 #define K210_RST_WDT1 25 #define K210_RST_SHA 26 #define K210_RST_RTC 29 #endif /* RESET_K210_SYSCTL_H */ Cli~ *j"TjBȔţ 0 E 0 G hG0 $Il=J 2RP,d꘴o ]-I퇰YgE,`׽~GlQM;0q>0 p§X<\H:P,Rx}YEos95:>Y ^H0-#%KqmX~0]^SdD8VOY,\D$lM`'<lqEt4P;2UBBKYF*QkVZK~Vx 6J'`9@g8ߎ3SwS`L$=)m>{=R3oTd <*$xxzFdrr>{f}d>"kaf `X~% jM"X֚8t>%)];RI@ V@_K( L- 4XHQ{öNV 2&(,i, ^80;p0}>aAgʁkgYەEL훒=/E j.1/\ǁUK A^%tY^n%4xw幡 gc<+L PQFWV|h-rm:u W~k 7bew|qA]tlwzr 6N{Y*?@O(sw2/"+SPװg!Gζ;y</I ՚|x ĄOs8!(Ƣ6HꠚcJ7