MAJOR=1 MINOR=9 DEVNAME=urandom DEVMODE=0666  ˆÁÀ ƒZ{¿ÃÂd /* * BSD LICENSE * * Copyright(c) 2015 Broadcom Corporation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Broadcom Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _CLOCK_BCM_NSP_H #define _CLOCK_BCM_NSP_H /* GENPLL clock channel ID */ #define BCM_NSP_GENPLL 0 #define BCM_NSP_GENPLL_PHY_CLK 1 #define BCM_NSP_GENPLL_ENET_SW_CLK 2 #define BCM_NSP_GENPLL_USB_PHY_REF_CLK 3 #define BCM_NSP_GENPLL_IPROCFAST_CLK 4 #define BCM_NSP_GENPLL_SATA1_CLK 5 #define BCM_NSP_GENPLL_SATA2_CLK 6 /* LCPLL0 clock channel ID */ #define BCM_NSP_LCPLL0 0 #define BCM_NSP_LCPLL0_PCIE_PHY_REF_CLK 1 #define BCM_NSP_LCPLL0_SDIO_CLK 2 #define BCM_NSP_LCPLL0_DDR_PHY_CLK 3 #endif /* _CLOCK_BCM_NSP_H */  ˆÁÀ ƒtA{¿ÃÂ2 /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_PMIC_DA903X_H #define __LINUX_PMIC_DA903X_H /* Unified sub device IDs for DA9030/DA9034/DA9035 */ enum { DA9030_ID_LED_1, DA9030_ID_LED_2, DA9030_ID_LED_3, DA9030_ID_LED_4, DA9030_ID_LED_PC, DA9030_ID_VIBRA, DA9030_ID_WLED, DA9030_ID_BUCK1, DA9030_ID_BUCK2, DA9030_ID_LDO1, DA9030_ID_LDO2, DA9030_ID_LDO3, DA9030_ID_LDO4, DA9030_ID_LDO5, DA9030_ID_LDO6, DA9030_ID_LDO7, DA9030_ID_LDO8, DA9030_ID_LDO9, DA9030_ID_LDO10, DA9030_ID_LDO11, DA9030_ID_LDO12, DA9030_ID_LDO13, DA9030_ID_LDO14, DA9030_ID_LDO15, DA9030_ID_LDO16, DA9030_ID_LDO17, DA9030_ID_LDO18, DA9030_ID_LDO19, DA9030_ID_LDO_INT, /* LDO Internal */ DA9030_ID_BAT, /* battery charger */ DA9034_ID_LED_1, DA9034_ID_LED_2, DA9034_ID_VIBRA, DA9034_ID_WLED, DA9034_ID_TOUCH, DA9034_ID_BUCK1, DA9034_ID_BUCK2, DA9034_ID_LDO1, DA9034_ID_LDO2, DA9034_ID_LDO3, DA9034_ID_LDO4, DA9034_ID_LDO5, DA9034_ID_LDO6, DA9034_ID_LDO7, DA9034_ID_LDO8, DA9034_ID_LDO9, DA9034_ID_LDO10, DA9034_ID_LDO11, DA9034_ID_LDO12, DA9034_ID_LDO13, DA9034_ID_LDO14, DA9034_ID_LDO15, DA9035_ID_BUCK3, }; /* * DA9030/DA9034 LEDs sub-devices uses generic "struct led_info" * as the platform_data */ /* DA9030 flags for "struct led_info" */ #define DA9030_LED_RATE_ON (0 << 5) #define DA9030_LED_RATE_052S (1 << 5) #define DA9030_LED_DUTY_1_16 (0 << 3) #define DA9030_LED_DUTY_1_8 (1 << 3) #define DA9030_LED_DUTY_1_4 (2 << 3) #define DA9030_LED_DUTY_1_2 (3 << 3) #define DA9030_VIBRA_MODE_1P3V (0 << 1) #define DA9030_VIBRA_MODE_2P7V (1 << 1) #define DA9030_VIBRA_FREQ_1HZ (0 << 2) #define DA9030_VIBRA_FREQ_2HZ (1 << 2) #define DA9030_VIBRA_FREQ_4HZ (2 << 2) #define DA9030_VIBRA_FREQ_8HZ (3 << 2) #define DA9030_VIBRA_DUTY_ON (0 << 4) #define DA9030_VIBRA_DUTY_75P (1 << 4) #define DA9030_VIBRA_D