MAJOR=7 MINOR=129 DEVNAME=vcsa1 #C }a4()P@74-%C/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __LINUX_OMAP_DMA_H #define __LINUX_OMAP_DMA_H /* * Legacy OMAP DMA handling defines and functions * * NOTE: Do not use these any longer. * * Use the generic dmaengine functions as defined in * include/linux/dmaengine.h. * * Copyright (C) 2003 Nokia Corporation * Author: Juha Yrjölä * */ #include #define INT_DMA_LCD (NR_IRQS_LEGACY + 25) #define OMAP1_DMA_TOUT_IRQ (1 << 0) #define OMAP_DMA_DROP_IRQ (1 << 1) #define OMAP_DMA_HALF_IRQ (1 << 2) #define OMAP_DMA_FRAME_IRQ (1 << 3) #define OMAP_DMA_LAST_IRQ (1 << 4) #define OMAP_DMA_BLOCK_IRQ (1 << 5) #define OMAP1_DMA_SYNC_IRQ (1 << 6) #define OMAP2_DMA_PKT_IRQ (1 << 7) #define OMAP2_DMA_TRANS_ERR_IRQ (1 << 8) #define OMAP2_DMA_SECURE_ERR_IRQ (1 << 9) #define OMAP2_DMA_SUPERVISOR_ERR_IRQ (1 << 10) #define OMAP2_DMA_MISALIGNED_ERR_IRQ (1 << 11) #define OMAP_DMA_CCR_EN (1 << 7) #define OMAP_DMA_CCR_RD_ACTIVE (1 << 9) #define OMAP_DMA_CCR_WR_ACTIVE (1 << 10) #define OMAP_DMA_CCR_SEL_SRC_DST_SYNC (1 << 24) #define OMAP_DMA_CCR_BUFFERING_DISABLE (1 << 25) #define OMAP_DMA_DATA_TYPE_S8 0x00 #define OMAP_DMA_DATA_TYPE_S16 0x01 #define OMAP_DMA_DATA_TYPE_S32 0x02 #define OMAP_DMA_SYNC_ELEMENT 0x00 #define OMAP_DMA_SYNC_FRAME 0x01 #define OMAP_DMA_SYNC_BLOCK 0x02 #define OMAP_DMA_SYNC_PACKET 0x03 #define OMAP_DMA_DST_SYNC_PREFETCH 0x02 #define OMAP_DMA_SRC_SYNC 0x01 #define OMAP_DMA_DST_SYNC 0x00 #define OMAP_DMA_PORT_EMIFF 0x00 #define OMAP_DMA_PORT_EMIFS 0x01 #define OMAP_DMA_PORT_OCP_T1 0x02 #define OMAP_DMA_PORT_TIPB 0x03 #define OMAP_DMA_PORT_OCP_T2 0x04 #define OMAP_DMA_PORT_MPUI 0x05 #define OMAP_DMA_AMODE_CONSTANT 0x00 #define OMAP_DMA_AMODE_POST_INC 0x01 #define OMAP_DMA_AMODE_SINGLE_IDX 0x02 #define OMAP_DMA_AMODE_DOUBLE_IDX 0x03 #define DMA_DEFAULT_FIFO_DEPTH 0x10 #define DMA_DEFAULT_ARB_RATE 0x01 /* Pass THREAD_RESERVE ORed with THREAD_FIFO for tparams */ #define DMA_THREAD_RESERVE_NORM (0x00 << 12) /* Def */ #define DMA_THREAD_RESERVE_ONET (0x01 << 12) #define DMA_THREAD_RESERVE_TWOT (0x02 << 12) #define DMA_THREAD_RESERVE_THREET (0x03 << 12) #define DMA_THREAD_FIFO_NONE (0x00 << 14) /* Def */ #define DMA_THREAD_FIFO_75 (0x01 << 14) #define DMA_THREAD_FIFO_25 (0x02 << 14) #define DMA_THREAD_FIFO_50 (0x03 << 14) /* DMA4_OCP_SYSCONFIG bits */ #define DMA_SYSCONFIG_MIDLEMODE_MASK (3 << 12) #define DMA_SYSCONFIG_CLOCKACTIVITY_MASK (3 << 8) #define DMA_SYSCONFIG_EMUFREE (1 << 5) #define DMA_SYSCONFIG_SIDLEMODE_MASK (3 << 3) #define DMA_SYSCONFIG_SOFTRESET (1 << 2) #define DMA_SYSCONFIG_AUTOIDLE (1 << 0) #define DMA_SYSCONFIG_MIDLEMODE(n) ((n) << 12) #define DMA_SYSCONFIG_SIDLEMODE(n) ((n) << 3) #define DMA_IDLEMODE_SMARTIDLE 0x2 #define DMA_IDLEMODE_NO_IDLE 0x1 #define DMA_IDLEMODE_FORCE_IDLE 0x0 /* Chaining modes*/ #ifndef CONFIG_ARCH_OMAP1 #define OMAP_DMA_STATIC_CHAIN 0x1 #define OMAP_DMA_DYNAMIC_CHAIN 0x2 #define OMAP_DMA_CHAIN_ACTIVE 0x1 #define OMAP_DMA_CHAIN_INACTIVE 0x0 #endif #define DMA_CH_PRIO_HIGH 0x1 #define DMA_CH_PRIO_LOW 0x0 /* Def */ /* Errata handling */ #define IS_DMA_ERRATA(id) (errata & (id)) #define SET_DMA_ERRATA(id) (errata |= (id)) #define DMA_ERRATA_IFRAME_BUFFERING BIT(0x0) #define DMA_ERRATA_PARALLEL_CHANNELS BIT(0x1) #define DMA_ERRATA_i378 BIT(0x2) #define DMA_ERRATA_i541 BIT(0x3) #define DMA_ERRATA_i88 BIT(0x4) #define DMA_ERRATA_3_3 BIT(0x5) #define DMA_ROMCODE_BUG BIT(0x6) /* Attributes for OMAP DMA Contrller */ #define DMA_LINKED_LCH BIT(0x0) #define GLOBAL_PRIORITY BIT(0x1) #define RESERVE_CHANNEL BIT(0x2) #define IS_CSSA_32 BIT(0x3) #define IS_CDSA_32 BIT(0x4) #define IS_RW_PRIORITY BIT(0x5) #define ENABLE_1510_MODE BIT(0x6) #define SRC_PORT BIT(0x7) #define DST_PORT BIT(0x8) #define SRC_INDEX BIT(0x9) #define DST_INDEX BIT(0xa) #define IS_BURST_ONLY4 BIT(0xb) #define CLEAR_CSR_ON_READ BIT(0xc) #define IS_WORD_16 BIT(0xd) #def