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     ˆÆÇ„eÇÅÁÉ ?÷     /* SPDX-License-Identifier: GPL-2.0 */
/*
 * Functions to access TPS6594 Power Management IC
 *
 * Copyright (C) 2023 BayLibre Incorporated - https://www.baylibre.com/
 */

#ifndef __LINUX_MFD_TPS6594_H
#define __LINUX_MFD_TPS6594_H

#include <linux/device.h>
#include <linux/regmap.h>

struct regmap_irq_chip_data;

/* Chip id list */
enum pmic_id {
	TPS6594,
	TPS6593,
	LP8764,
};

/* Macro to get page index from register address */
#define TPS6594_REG_TO_PAGE(reg)	((reg) >> 8)

/* Registers for page 0 of TPS6594 */
#define TPS6594_REG_DEV_REV				0x01

#define TPS6594_REG_NVM_CODE_1				0x02
#define TPS6594_REG_NVM_CODE_2				0x03

#define TPS6594_REG_BUCKX_CTRL(buck_inst)		(0x04 + ((buck_inst) << 1))
#define TPS6594_REG_BUCKX_CONF(buck_inst)		(0x05 + ((buck_inst) << 1))
#define TPS6594_REG_BUCKX_VOUT_1(buck_inst)		(0x0e + ((buck_inst) << 1))
#define TPS6594_REG_BUCKX_VOUT_2(buck_inst)		(0x0f + ((buck_inst) << 1))
#define TPS6594_REG_BUCKX_PG_WINDOW(buck_inst)		(0x18 + (buck_inst))

#define TPS6594_REG_LDOX_CTRL(ldo_inst)			(0x1d + (ldo_inst))
#define TPS6594_REG_LDORTC_CTRL				0x22
#define TPS6594_REG_LDOX_VOUT(ldo_inst)			(0x23 + (ldo_inst))
#define TPS6594_REG_LDOX_PG_WINDOW(ldo_inst)		(0x27 + (ldo_inst))

#define TPS6594_REG_VCCA_VMON_CTRL			0x2b
#define TPS6594_REG_VCCA_PG_WINDOW			0x2c
#define TPS6594_REG_VMON1_PG_WINDOW			0x2d
#define TPS6594_REG_VMON1_PG_LEVEL			0x2e
#define TPS6594_REG_VMON2_PG_WINDOW			0x2f
#define TPS6594_REG_VMON2_PG_LEVEL			0x30

#define TPS6594_REG_GPIOX_CONF(gpio_inst)		(0x31 + (gpio_inst))
#define TPS6594_REG_NPWRON_CONF				0x3c
#define TPS6594_REG_GPIO_OUT_1				0x3d
#define TPS6594_REG_GPIO_OUT_2				0x3e
#define TPS6594_REG_GPIO_IN_1				0x3f
#define TPS6594_REG_GPIO_IN_2				0x40
#define TPS6594_REG_GPIOX_OUT(gpio_inst)		(TPS6594_REG_GPIO_OUT_1 + (gpio_inst) / 8)
#define TPS6594_REG_GPIOX_IN(gpio_inst)			(TPS6594_REG_GPIO_IN_1 + (gpio_inst) / 8)

#define TPS6594_REG_GPIO_IN_1				0x3f
#define TPS6594_REG_GPIO_IN_2				0x40

#define TPS6594_REG_RAIL_SEL_1				0x41
#define TPS6594_REG_RAIL_SEL_2				0x42
#define TPS6594_REG_RAIL_SEL_3				0x43

#define TPS6594_REG_FSM_TRIG_SEL_1			0x44
#define TPS6594_REG_FSM_TRIG_SEL_2			0x45
#define TPS6594_REG_FSM_TRIG_MASK_1			0x46
#define TPS6594_REG_FSM_TRIG_MASK_2			0x47
#define TPS6594_REG_FSM_TRIG_MASK_3			0x48

#define TPS6594_REG_MASK_BUCK1_2			0x49
#define TPS6594_REG_MASK_BUCK3_4			0x4a
#define TPS6594_REG_MASK_BUCK5				0x4b
#define TPS6594_REG_MASK_LDO1_2				0x4c
#define TPS6594_REG_MASK_LDO3_4				0x4d
#define TPS6594_REG_MASK_VMON				0x4e
#define TPS6594_REG_MASK_GPIO1_8_FALL			0x4f
#define TPS6594_REG_MASK_GPIO1_8_RISE			0x50
#define TPS6594_REG_MASK_GPIO9_11			0x51
#define TPS6594_REG_MASK_STARTUP			0x52
#define TPS6594_REG_MASK_MISC				0x53
#define TPS6594_REG_MASK_MODERATE_ERR			0x54
#define TPS6594_REG_MASK_FSM_ERR			0x56
#define TPS6594_REG_MASK_COMM_ERR			0x57
#define TPS6594_REG_MASK_READBACK_ERR			0x58
#define TPS6594_REG_MASK_ESM				0x59

#define TPS6594_REG_INT_TOP				0x5a
#define TPS6594_REG_INT_BUCK				0x5b
#define TPS6594_REG_INT_BUCK1_2				0x5c
#define TPS6594_REG_INT_BUCK3_4				0x5d
#define TPS6594_REG_INT_BUCK5				0x5e
#define TPS6594_REG_INT_LDO_VMON			0x5f
#define TPS6594_REG_INT_LDO1_2				0x60
#define TPS6594_REG_INT_LDO3_4				0x61
#define TPS6594_REG_INT_VMON				0x62
#define TPS6594_REG_INT_GPIO				0x63
#define TPS6594_REG_INT_GPIO1_8				0x64
#define TPS6594_REG_INT_STARTUP				0x65
#define TPS6594_REG_INT_MISC				0x66
#define TPS6594_REG_INT_MODERATE_ERR			0x67
#define TPS6594_REG_INT_SEVERE_ERR			0x68
#define TPS6594_REG_INT_FSM_ERR				0x69
#define TPS6594_REG_INT_COMM_ERR			0x6a
#define TPS6594_REG_INT_READBACK_ERR			0x6b
#define TPS6594_REG_INT_ESM				0x6c

#define TPS6594_REG_STAT_BUCK1_2			0x6d
#define TPS6594_REG_STAT_BUCK3_4			0x6e
#define TPS6594_REG_STAT_BUCK5				0x6f
#define TPS6594_REG_STAT_LDO1_2				0x70
#define TPS6594_REG_STAT_LDO3_4				0x71
#define TPS6594_REG_STAT_VMON				0x72
#define TPS6594_REG_STAT_STARTUP			0x73
#define TPS6594_REG_STAT_MISC				0x74
#define TPS6594_REG