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Index of /anon_sym/anon/sys/dev/char/4:61/subsystem/ttyS2/device/serial8250:0/serial8250:0.1
Index of /anon_sym/anon/sys/dev/char/4:61/subsystem/ttyS2/device/serial8250:0/serial8250:0.1
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qг_I|+ 9 /* SPDX-License-Identifier: GPL-2.0 */
#ifndef __LINUX_PARPORT_PC_H
#define __LINUX_PARPORT_PC_H
#include
/* --- register definitions ------------------------------- */
#define ECONTROL(p) ((p)->base_hi + 0x2)
#define CONFIGB(p) ((p)->base_hi + 0x1)
#define CONFIGA(p) ((p)->base_hi + 0x0)
#define FIFO(p) ((p)->base_hi + 0x0)
#define EPPDATA(p) ((p)->base + 0x4)
#define EPPADDR(p) ((p)->base + 0x3)
#define CONTROL(p) ((p)->base + 0x2)
#define STATUS(p) ((p)->base + 0x1)
#define DATA(p) ((p)->base + 0x0)
struct parport_pc_private {
/* Contents of CTR. */
unsigned char ctr;
/* Bitmask of writable CTR bits. */
unsigned char ctr_writable;
/* Whether or not there's an ECR. */
int ecr;
/* Number of PWords that FIFO will hold. */
int fifo_depth;
/* Number of bytes per portword. */
int pword;
/* Not used yet. */
int readIntrThreshold;
int writeIntrThreshold;
/* buffer suitable for DMA, if DMA enabled */
char *dma_buf;
dma_addr_t dma_handle;
struct list_head list;
struct parport *port;
};
struct parport_pc_via_data
{
/* ISA PnP IRQ routing register 1 */
u8 via_pci_parport_irq_reg;
/* ISA PnP DMA request routing register */
u8 via_pci_parport_dma_reg;
/* Register and value to enable SuperIO configuration access */
u8 via_pci_superio_config_reg;
u8 via_pci_superio_config_data;
/* SuperIO function register number */
u8 viacfg_function;
/* parallel port control register number */
u8 viacfg_parport_control;
/* Parallel port base address register */
u8 viacfg_parport_base;
};
static __inline__ void parport_pc_write_data(struct parport *p, unsigned char d)
{
#ifdef DEBUG_PARPORT
printk (KERN_DEBUG "parport_pc_write_data(%p,0x%02x)\n", p, d);
#endif
outb(d, DATA(p));
}
static __inline__ unsigned char parport_pc_read_data(struct parport *p)
{
unsigned char val = inb (DATA (p));
#ifdef DEBUG_PARPORT
printk (KERN_DEBUG "parport_pc_read_data(%p) = 0x%02x\n",
p, val);
#endif
return val;
}
#ifdef DEBUG_PARPORT
static inline void dump_parport_state (char *str, struct parport *p)
{
/* here's hoping that reading these ports won't side-effect anything underneath */
unsigned char ecr = inb (ECONTROL (p));
unsigned char dcr = inb (CONTROL (p));
unsigned char dsr = inb (STATUS (p));
static const char *const ecr_modes[] = {"SPP", "PS2", "PPFIFO", "ECP", "xXx", "yYy", "TST", "CFG"};
const struct parport_pc_private *priv = p->physport->priva