QEMU QEMU USB Tablet
     7ˆÉÊ„ y¯È¿Ì 3    7/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Copyright (C) 2019 ROHM Semiconductors */

#ifndef __LINUX_MFD_BD71828_H__
#define __LINUX_MFD_BD71828_H__

#include <linux/mfd/rohm-generic.h>
#include <linux/mfd/rohm-shared.h>

/* Regulator IDs */
enum {
	BD71828_BUCK1,
	BD71828_BUCK2,
	BD71828_BUCK3,
	BD71828_BUCK4,
	BD71828_BUCK5,
	BD71828_BUCK6,
	BD71828_BUCK7,
	BD71828_LDO1,
	BD71828_LDO2,
	BD71828_LDO3,
	BD71828_LDO4,
	BD71828_LDO5,
	BD71828_LDO6,
	BD71828_LDO_SNVS,
	BD71828_REGULATOR_AMOUNT,
};

#define BD71828_BUCK1267_VOLTS		0x100
#define BD71828_BUCK3_VOLTS		0x20
#define BD71828_BUCK4_VOLTS		0x40
#define BD71828_BUCK5_VOLTS		0x20
#define BD71828_LDO_VOLTS		0x40
/* LDO6 is fixed 1.8V voltage */
#define BD71828_LDO_6_VOLTAGE		1800000

/* Registers and masks*/

/* MODE control */
#define BD71828_REG_PS_CTRL_1		0x04
#define BD71828_REG_PS_CTRL_2		0x05
#define BD71828_REG_PS_CTRL_3		0x06

//#define BD71828_REG_SWRESET		0x06
#define BD71828_MASK_RUN_LVL_CTRL	0x30

/* Regulator control masks */

#define BD71828_MASK_RAMP_DELAY		0x6

#define BD71828_MASK_RUN_EN		0x08
#define BD71828_MASK_SUSP_EN		0x04
#define BD71828_MASK_IDLE_EN		0x02
#define BD71828_MASK_LPSR_EN		0x01

#define BD71828_MASK_RUN0_EN		0x01
#define BD71828_MASK_RUN1_EN		0x02
#define BD71828_MASK_RUN2_EN		0x04
#define BD71828_MASK_RUN3_EN		0x08

#define BD71828_MASK_DVS_BUCK1_CTRL	0x10
#define BD71828_DVS_BUCK1_CTRL_I2C	0
#define BD71828_DVS_BUCK1_USE_RUNLVL	0x10

#define BD71828_MASK_DVS_BUCK2_CTRL	0x20
#define BD71828_DVS_BUCK2_CTRL_I2C	0
#define BD71828_DVS_BUCK2_USE_RUNLVL	0x20

#define BD71828_MASK_DVS_BUCK6_CTRL	0x40
#define BD71828_DVS_BUCK6_CTRL_I2C	0
#define BD71828_DVS_BUCK6_USE_RUNLVL	0x40

#define BD71828_MASK_DVS_BUCK7_CTRL	0x80
#define BD71828_DVS_BUCK7_CTRL_I2C	0
#define BD71828_DVS_BUCK7_USE_RUNLVL	0x80

#define BD71828_MASK_BUCK1267_VOLT	0xff
#define BD71828_MASK_BUCK3_VOLT		0x1f
#define BD71828_MASK_BUCK4_VOLT		0x3f
#define BD71828_MASK_BUCK5_VOLT		0x1f
#define BD71828_MASK_LDO_VOLT		0x3f

/* Regulator control regs */
#define BD71828_REG_BUCK1_EN		0x08
#define BD71828_REG_BUCK1_CTRL		0x09
#define BD71828_REG_BUCK1_MODE		0x0a
#define BD71828_REG_BUCK1_IDLE_VOLT	0x0b
#define BD71828_REG_BUCK1_SUSP_VOLT	0x0c
#define BD71828_REG_BUCK1_VOLT		0x0d

#define BD71828_REG_BUCK2_EN		0x12
#define BD71828_REG_BUCK2_CTRL		0x13
#define BD71828_REG_BUCK2_MODE		0x14
#define BD71828_REG_BUCK2_IDLE_VOLT	0x15
#define BD71828_REG_BUCK2_SUSP_VOLT	0x16
#define BD71828_REG_BUCK2_VOLT		0x17

#define BD71828_REG_BUCK3_EN		0x1c
#define BD71828_REG_BUCK3_MODE		0x1d
#define BD71828_REG_BUCK3_VOLT		0x1e

#define BD71828_REG_BUCK4_EN		0x1f
#define BD71828_REG_BUCK4_MODE		0x20
#define BD71828_REG_BUCK4_VOLT		0x21

#define BD71828_REG_BUCK5_EN		0x22
#define BD71828_REG_BUCK5_MODE		0x23
#define BD71828_REG_BUCK5_VOLT		0x24

#define BD71828_REG_BUCK6_EN		0x25
#define BD71828_REG_BUCK6_CTRL		0x26
#define BD71828_REG_BUCK6_MODE		0x27
#define BD71828_REG_BUCK6_IDLE_VOLT	0x28
#define BD71828_REG_BUCK6_SUSP_VOLT	0x29
#define BD71828_REG_BUCK6_VOLT		0x2a

#define BD71828_REG_BUCK7_EN		0x2f
#define BD71828_REG_BUCK7_CTRL		0x30
#define BD71828_REG_BUCK7_MODE		0x31
#define BD71828_REG_BUCK7_IDLE_VOLT	0x32
#define BD71828_REG_BUCK7_SUSP_VOLT	0x33
#define BD71828_REG_BUCK7_VOLT		0x34

#define BD71828_REG_LDO1_EN		0x39
#define BD71828_REG_LDO1_VOLT		0x3a
#define BD71828_REG_LDO2_EN		0x3b
#define BD71828_REG_LDO2_VOLT		0x3c
#define BD71828_REG_LDO3_EN		0x3d
#define BD71828_REG_LDO3_VOLT		0x3e
#define BD71828_REG_LDO4_EN		0x3f
#define BD71828_REG_LDO4_VOLT		0x40
#define BD71828_REG_LDO5_EN		0x41
#define BD71828_REG_LDO5_VOLT		0x43
#define BD71828_REG_LDO5_VOLT_OPT	0x42
#define BD71828_REG_LDO6_EN		0x44
//#define BD71828_REG_LDO6_VOLT		0x4
#define BD71828_REG_LDO7_EN		0x45
#define BD71828_REG_LDO7_VOLT		0x46

/* GPIO */

#define BD71828_GPIO_DRIVE_MASK		0x2
#define BD71828_GPIO_OPEN_DRAIN		0x0
#define BD71828_GPIO_PUSH_PULL		0x2
#define BD71828_GPIO_OUT_HI		0x1
#define BD71828_GPIO_OUT_LO		0x0
#define BD71828_GPIO_OUT_MASK		0x1

#def