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      €l–Я=їJ	•2ЫB‚ њP@ёИnе1hЯБ0ДГ     	€ВБѓ!АДГ 	    	/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (C) 2014 Alexander Shiyan <shc_work@mail.ru>
 */

#ifndef __DT_BINDINGS_CLOCK_IMX21_H
#define __DT_BINDINGS_CLOCK_IMX21_H

#define IMX21_CLK_DUMMY			0
#define IMX21_CLK_CKIL			1
#define IMX21_CLK_CKIH			2
#define IMX21_CLK_FPM			3
#define IMX21_CLK_CKIH_DIV1P5		4
#define IMX21_CLK_MPLL_GATE		5
#define IMX21_CLK_SPLL_GATE		6
#define IMX21_CLK_FPM_GATE		7
#define IMX21_CLK_CKIH_GATE		8
#define IMX21_CLK_MPLL_OSC_SEL		9
#define IMX21_CLK_IPG			10
#define IMX21_CLK_HCLK			11
#define IMX21_CLK_MPLL_SEL		12
#define IMX21_CLK_SPLL_SEL		13
#define IMX21_CLK_SSI1_SEL		14
#define IMX21_CLK_SSI2_SEL		15
#define IMX21_CLK_USB_DIV		16
#define IMX21_CLK_FCLK			17
#define IMX21_CLK_MPLL			18
#define IMX21_CLK_SPLL			19
#define IMX21_CLK_NFC_DIV		20
#define IMX21_CLK_SSI1_DIV		21
#define IMX21_CLK_SSI2_DIV		22
#define IMX21_CLK_PER1			23
#define IMX21_CLK_PER2			24
#define IMX21_CLK_PER3			25
#define IMX21_CLK_PER4			26
#define IMX21_CLK_UART1_IPG_GATE	27
#define IMX21_CLK_UART2_IPG_GATE	28
#define IMX21_CLK_UART3_IPG_GATE	29
#define IMX21_CLK_UART4_IPG_GATE	30
#define IMX21_CLK_CSPI1_IPG_GATE	31
#define IMX21_CLK_CSPI2_IPG_GATE	32
#define IMX21_CLK_SSI1_GATE		33
#define IMX21_CLK_SSI2_GATE		34
#define IMX21_CLK_SDHC1_IPG_GATE	35
#define IMX21_CLK_SDHC2_IPG_GATE	36
#define IMX21_CLK_GPIO_GATE		37
#define IMX21_CLK_I2C_GATE		38
#define IMX21_CLK_DMA_GATE		39
#define IMX21_CLK_USB_GATE		40
#define IMX21_CLK_EMMA_GATE		41
#define IMX21_CLK_SSI2_BAUD_GATE	42
#define IMX21_CLK_SSI1_BAUD_GATE	43
#define IMX21_CLK_LCDC_IPG_GATE		44
#define IMX21_CLK_NFC_GATE		45
#define IMX21_CLK_LCDC_HCLK_GATE	46
#define IMX21_CLK_PER4_GATE		47
#define IMX21_CLK_BMI_GATE		48
#define IMX21_CLK_USB_HCLK_GATE		49
#define IMX21_CLK_SLCDC_GATE		50
#define IMX21_CLK_SLCDC_HCLK_GATE	51
#define IMX21_CLK_EMMA_HCLK_GATE	52
#define IMX21_CLK_BROM_GATE		53
#define IMX21_CLK_DMA_HCLK_GATE		54
#define IMX21_CLK_CSI_HCLK_GATE		55
#define IMX21_CLK_CSPI3_IPG_GATE	56
#define IMX21_CLK_WDOG_GATE		57
#define IMX21_CLK_GPT1_IPG_GATE		58
#define IMX21_CLK_GPT2_IPG_GATE		59
#define IMX21_CLK_GPT3_IPG_GATE		60
#define IMX21_CLK_PWM_IPG_GATE		61
#define IMX21_CLK_RTC_GATE		62
#define IMX21_CLK_KPP_GATE		63
#define IMX21_CLK_OWIRE_GATE		64
#define IMX21_CLK_MAX			65

#endif
     €ВБ„г_АДГ 'ґ    /* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2012-2014 The Linux Foundation. All rights reserved.
 */

#ifndef _LINUX_IOPOLL_H
#define _LINUX_IOPOLL_H

#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/ktime.h>
#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/io.h>

/**
 * poll_timeout_us - Periodically poll and perform an operation until
 *                   a condition is met or a timeout occurs
 *
 * @op: Operation
 * @cond: Break condition
 * @sleep_us: Maximum time to sleep between operations in us (0 tight-loops).
 *            Please read usleep_range() function description for details and
 *            limitations.
 * @timeout_us: Timeout in us, 0 means never timeout
 * @sleep_before_op: if it is true, sleep @sleep_us before operation.
 *
 * When available, you'll probably want to use one of the specialized
 * macros defined below rather than this macro directly.
 *
 * Returns: 0 on success and -ETIMEDOUT upon a timeout. Must not
 * be called from atomic context if sleep_us or timeout_us are used.
 */
#define poll_timeout_us(op, cond, sleep_us, timeout_us, sleep_before_op) \
({ \
	u64 __timeout_us = (timeout_us); \
	unsigned long __sleep_us = (sleep_us); \
	ktime_t __timeout = ktime_add_us(ktime_get(), __timeout_us); \
	might_sleep_if((__sleep_us) != 0); \
	if ((sleep_before_op) && __sleep_us) \
		usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
	for (;;) { \
		op; \
		if (cond) \
			break; \
		if (__timeout_us && \
		    ktime_compare(ktime_get(), __timeout) > 0) { \
			op; \
			break; \
		} \
		if (__sleep_us) \
			usleep_range((__sleep_us >> 2) + 1, __sleep_us); \
		cpu_relax(); \
	} \