ˆÂÁ „ Ï?ÀÄÃ?÷ /* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __SOUND_GUS_H #define __SOUND_GUS_H /* * Global structures used for GUS part of ALSA driver * Copyright (c) by Jaroslav Kysela */ #include #include #include #include #include #include /* IO ports */ #define GUSP(gus, x) ((gus)->gf1.port + SNDRV_g_u_s_##x) #define SNDRV_g_u_s_MIDICTRL (0x320-0x220) #define SNDRV_g_u_s_MIDISTAT (0x320-0x220) #define SNDRV_g_u_s_MIDIDATA (0x321-0x220) #define SNDRV_g_u_s_GF1PAGE (0x322-0x220) #define SNDRV_g_u_s_GF1REGSEL (0x323-0x220) #define SNDRV_g_u_s_GF1DATALOW (0x324-0x220) #define SNDRV_g_u_s_GF1DATAHIGH (0x325-0x220) #define SNDRV_g_u_s_IRQSTAT (0x226-0x220) #define SNDRV_g_u_s_TIMERCNTRL (0x228-0x220) #define SNDRV_g_u_s_TIMERDATA (0x229-0x220) #define SNDRV_g_u_s_DRAM (0x327-0x220) #define SNDRV_g_u_s_MIXCNTRLREG (0x220-0x220) #define SNDRV_g_u_s_IRQDMACNTRLREG (0x22b-0x220) #define SNDRV_g_u_s_REGCNTRLS (0x22f-0x220) #define SNDRV_g_u_s_BOARDVERSION (0x726-0x220) #define SNDRV_g_u_s_MIXCNTRLPORT (0x726-0x220) #define SNDRV_g_u_s_IVER (0x325-0x220) #define SNDRV_g_u_s_MIXDATAPORT (0x326-0x220) #define SNDRV_g_u_s_MAXCNTRLPORT (0x326-0x220) /* GF1 registers */ /* global registers */ #define SNDRV_GF1_GB_ACTIVE_VOICES 0x0e #define SNDRV_GF1_GB_VOICES_IRQ 0x0f #define SNDRV_GF1_GB_GLOBAL_MODE 0x19 #define SNDRV_GF1_GW_LFO_BASE 0x1a #define SNDRV_GF1_GB_VOICES_IRQ_READ 0x1f #define SNDRV_GF1_GB_DRAM_DMA_CONTROL 0x41 #define SNDRV_GF1_GW_DRAM_DMA_LOW 0x42 #define SNDRV_GF1_GW_DRAM_IO_LOW 0x43 #define SNDRV_GF1_GB_DRAM_IO_HIGH 0x44 #define SNDRV_GF1_GB_SOUND_BLASTER_CONTROL 0x45 #define SNDRV_GF1_GB_ADLIB_TIMER_1 0x46 #define SNDRV_GF1_GB_ADLIB_TIMER_2 0x47 #define SNDRV_GF1_GB_RECORD_RATE 0x48 #define SNDRV_GF1_GB_REC_DMA_CONTROL 0x49 #define SNDRV_GF1_GB_JOYSTICK_DAC_LEVEL 0x4b #define SNDRV_GF1_GB_RESET 0x4c #define SNDRV_GF1_GB_DRAM_DMA_HIGH 0x50 #define SNDRV_GF1_GW_DRAM_IO16 0x51 #define SNDRV_GF1_GW_MEMORY_CONFIG 0x52 #define SNDRV_GF1_GB_MEMORY_CONTROL 0x53 #define SNDRV_GF1_GW_FIFO_RECORD_BASE_ADDR 0x54 #define SNDRV_GF1_GW_FIFO_PLAY_BASE_ADDR 0x55 #define SNDRV_GF1_GW_FIFO_SIZE 0x56 #define SNDRV_GF1_GW_INTERLEAVE 0x57 #define SNDRV_GF1_GB_COMPATIBILITY 0x59 #define SNDRV_GF1_GB_DECODE_CONTROL 0x5a #define SNDRV_GF1_GB_VERSION_NUMBER 0x5b #define SNDRV_GF1_GB_MPU401_CONTROL_A 0x5c #define SNDRV_GF1_GB_MPU401_CONTROL_B 0x5d #define SNDRV_GF1_GB_EMULATION_IRQ 0x60 /* voice specific registers */ #define SNDRV_GF1_VB_ADDRESS_CONTROL 0x00 #define SNDRV_GF1_VW_FREQUENCY 0x01 #define SNDRV_GF1_VW_START_HIGH 0x02 #define SNDRV_GF1_VW_START_LOW 0x03 #define SNDRV_GF1_VA_START SNDRV_GF1_VW_START_HIGH #define SNDRV_GF1_VW_END_HIGH 0x04 #define SNDRV_GF1_VW_END_LOW 0x05 #define SNDRV_GF1_VA_END SNDRV_GF1_VW_END_HIGH #define SNDRV_GF1_VB_VOLUME_RATE 0x06 #define SNDRV_GF1_VB_VOLUME_START 0x07 #define SNDRV_GF1_VB_VOLUME_END 0x08 #define SNDRV_GF1_VW_VOLUME 0x09 #define SNDRV_GF1_VW_CURRENT_HIGH 0x0a #define SNDRV_GF1_VW_CURRENT_LOW 0x0b #define SNDRV_GF1_VA_CURRENT SNDRV_GF1_VW_CURRENT_HIGH #define SNDRV_GF1_VB_PAN 0x0c #define SNDRV_GF1_VW_OFFSET_RIGHT 0x0c #define SNDRV_GF1_VB_VOLUME_CONTROL 0x0d #define SNDRV_GF1_VB_UPPER_ADDRESS 0x10 #define SNDRV_GF1_VW_EFFECT_HIGH 0x11 #define SNDRV_GF1_VW_EFFECT_LOW 0x12 #define SNDRV_GF1_VA_EFFECT SNDRV_GF1_VW_EFFECT_HIGH #define SNDRV_GF1_VW_OFFSET_LEFT 0x13 #define SNDRV_GF1_VB_ACCUMULATOR 0x14 #define SNDRV_GF1_VB_MODE 0x15 #define SNDRV_GF1_VW_EFFECT_VOLUME 0x16 #define SNDRV_GF1_VB_FREQUENCY_LFO 0x17 #define SNDRV_GF1_VB_VOLUME_LFO 0x18 #define SNDRV_GF1_VW_OFFSET_RIGHT_FINAL 0x1b #define SNDRV_GF1_VW_OFFSET_LEFT_FINAL 0x1c #define SNDRV_GF1_VW_EFFECT_VOLUME_FINAL 0x1d /* ICS registers */ #define SNDRV_ICS_MIC_DEV 0 #define SNDRV_ICS_LINE_DEV 1 #define SNDRV_ICS_CD_DEV 2 #define SNDRV_ICS_GF1_DEV 3 #define SNDRV_ICS_NONE_DEV