disabled *l4( (  fB- }_I|+$/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * Copyright (C) 2013 Samsung Electronics Co., Ltd. */ #ifndef _UNIPRO_H_ #define _UNIPRO_H_ /* * M-TX Configuration Attributes */ #define TX_HIBERN8TIME_CAPABILITY 0x000F #define TX_MODE 0x0021 #define TX_HSRATE_SERIES 0x0022 #define TX_HSGEAR 0x0023 #define TX_PWMGEAR 0x0024 #define TX_AMPLITUDE 0x0025 #define TX_HS_SLEWRATE 0x0026 #define TX_SYNC_SOURCE 0x0027 #define TX_HS_SYNC_LENGTH 0x0028 #define TX_HS_PREPARE_LENGTH 0x0029 #define TX_LS_PREPARE_LENGTH 0x002A #define TX_HIBERN8_CONTROL 0x002B #define TX_LCC_ENABLE 0x002C #define TX_PWM_BURST_CLOSURE_EXTENSION 0x002D #define TX_BYPASS_8B10B_ENABLE 0x002E #define TX_DRIVER_POLARITY 0x002F #define TX_HS_UNTERMINATED_LINE_DRIVE_ENABLE 0x0030 #define TX_LS_TERMINATED_LINE_DRIVE_ENABLE 0x0031 #define TX_LCC_SEQUENCER 0x0032 #define TX_MIN_ACTIVATETIME 0x0033 #define TX_PWM_G6_G7_SYNC_LENGTH 0x0034 #define TX_REFCLKFREQ 0x00EB #define TX_CFGCLKFREQVAL 0x00EC #define CFGEXTRATTR 0x00F0 #define DITHERCTRL2 0x00F1 /* * M-RX Configuration Attributes */ #define RX_HS_G1_SYNC_LENGTH_CAP 0x008B #define RX_HS_G1_PREP_LENGTH_CAP 0x008C #define RX_MIN_ACTIVATETIME_CAPABILITY 0x008F #define RX_HIBERN8TIME_CAPABILITY 0x0092 #define RX_HS_G2_SYNC_LENGTH_CAP 0x0094 #define RX_HS_G3_SYNC_LENGTH_CAP 0x0095 #define RX_HS_G2_PREP_LENGTH_CAP 0x0096 #define RX_HS_G3_PREP_LENGTH_CAP 0x0097 #define RX_ADV_GRANULARITY_CAP 0x0098 #define RX_HIBERN8TIME_CAP 0x0092 #define RX_ADV_HIBERN8TIME_CAP 0x0099 #define RX_ADV_MIN_ACTIVATETIME_CAP 0x009A #define RX_MODE 0x00A1 #define RX_HSRATE_SERIES 0x00A2 #define RX_HSGEAR 0x00A3 #define RX_PWMGEAR 0x00A4 #define RX_LS_TERMINATED_ENABLE 0x00A5 #define RX_HS_UNTERMINATED_ENABLE 0x00A6 #define RX_ENTER_HIBERN8 0x00A7 #define RX_BYPASS_8B10B_ENABLE 0x00A8 #define RX_TERMINATION_FORCE_ENABLE 0x00A9 #define RXCALCTRL 0x00B4 #define RXSQCTRL 0x00B5 #define CFGRXCDR8 0x00BA #define CFGRXOVR8 0x00BD #define CFGRXOVR6 0x00BF #define RXDIRECTCTRL2 0x00C7 #define CFGRXOVR4 0x00E9 #define RX_REFCLKFREQ 0x00EB #define RX_CFGCLKFREQVAL 0x00EC #define CFGWIDEINLN 0x00F0 #define ENARXDIRECTCFG4 0x00F2 #define ENARXDIRECTCFG3 0x00F3 #define ENARXDIRECTCFG2 0x00F4 #define is_mphy_tx_attr(attr) (attr < RX_MODE) #define RX_ADV_FINE_GRAN_STEP(x) ((((x) & 0x3) << 1) | 0x1) #define SYNC_LEN_FINE(x) ((x) & 0x3F) #define SYNC_LEN_COARSE(x) ((1 << 6) | ((x) & 0x3F)) #define PREP_LEN(x) ((x) & 0xF) #define RX_MIN_ACTIVATETIME_UNIT_US 100 #define HIBERN8TIME_UNIT_US 100 /* * Common Block Attributes */ #define TX_GLOBALHIBERNATE UNIPRO_CB_OFFSET(0x002B) #define REFCLKMODE UNIPRO_CB_OFFSET(0x00BF) #define DIRECTCTRL19 UNIPRO_CB_OFFSET(0x00CD) #define DIRECTCTRL10 UNIPRO_CB_OFFSET(0x00E6) #define CDIRECTCTRL6 UNIPRO_CB_OFFSET(0x00EA) #define RTOBSERVESELECT UNIPRO_CB_OFFSET(0x00F0) #define CBDIVFACTOR UNIPRO_CB_OFFSET(0x00F1) #define CBDCOCTRL5 UNIPRO_CB_OFFSET(0x00F3) #define CBPRGPLL2 UNIPRO_CB_OFFSET(0x00F8) #define CBPRGTUNING UNIPRO_CB_OFFSET(0x00FB) #define UNIPRO_CB_OFFSET(x) (0x8000 | x) /* * PHY Adapter attributes */ #define PA_PHY_TYPE 0x1500 #define PA_AVAILTXDATALANES 0x1520 #define PA_MAXTXSPEEDFAST 0x1521 #define PA_MAXTXSPEEDSLOW 0x1522 #define PA_MAXRXSPEEDFAST 0x1541 #define PA_MAXRXSPEEDSLOW 0x1542 #define PA_TXLINKSTARTUPHS 0x1544 #define PA_AVAILRXDATALANES 0x1540 #define PA_MINRXTRAILINGCLOCKS 0x1543 #define PA_LOCAL_TX_LCC_ENABLE 0x155E #define PA_ACTIVETXDATALANES 0x1560 #define PA_CONNECTEDTXDATALANES 0x1561 #define PA_TXFORCECLOCK 0x1562 #define PA_TXPWRMODE 0x1563 #define PA_TXTRAILINGCLOCKS 0x1564 #define PA_TXSPEEDFAST 0x1565 #define PA_TXSPEEDSLOW 0x1566 #define PA_TXPWRSTATUS 0x1567 #define PA_TXGEAR 0x1568 #define PA_TXTERMINATION 0x1569 #define PA_HSSERIES 0x156A #define PA_LEGACYDPHYESCDL 0x1570 #define PA_PWRMODE 0x1571 #define PA_ACTIVER