1843200   File not found. * l4( (  fB- /_I|+n /* SPDX-License-Identifier: GPL-2.0-or-later */ /* * CCI cache coherent interconnect support * * Copyright (C) 2013 ARM Ltd. */ #ifndef __LINUX_ARM_CCI_H #define __LINUX_ARM_CCI_H #include #include #include struct device_node; #ifdef CONFIG_ARM_CCI extern bool cci_probed(void); #else static inline bool cci_probed(void) { return false; } #endif #ifdef CONFIG_ARM_CCI400_PORT_CTRL extern int cci_ace_get_port(struct device_node *dn); extern int cci_disable_port_by_cpu(u64 mpidr); extern int __cci_control_port_by_device(struct device_node *dn, bool enable); extern int __cci_control_port_by_index(u32 port, bool enable); #else static inline int cci_ace_get_port(struct device_node *dn) { return -ENODEV; } static inline int cci_disable_port_by_cpu(u64 mpidr) { return -ENODEV; } static inline int __cci_control_port_by_device(struct device_node *dn, bool enable) { return -ENODEV; } static inline int __cci_control_port_by_index(u32 port, bool enable) { return -ENODEV; } #endif #define cci_disable_port_by_device(dev) \ __cci_control_port_by_device(dev, false) #define cci_enable_port_by_device(dev) \ __cci_control_port_by_device(dev, true) #define cci_disable_port_by_index(dev) \ __cci_control_port_by_index(dev, false) #define cci_enable_port_by_index(dev) \ __cci_control_port_by_index(dev, true) #endif    Index of /FSS-OZR/root/sys/dev/char/13:66/device/subsystem/input4/event2

Index of /FSS-OZR/root/sys/dev/char/13:66/device/subsystem/input4/event2

 NameLast modifiedSizeDescription
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 uevent 2026-10-11 13:07 4.0K 
 dev 2026-10-11 13:01 4.0K 
 power/ 2026-10-11 12:52 -  
 subsystem/ 2026-10-11 12:29 -  
 device/ 2026-10-10 22:25 -  
 O Index of /anon_sym/anon/sys/class/input/input3/subsystem/input1/id

Index of /anon_sym/anon/sys/class/input/input3/subsystem/input1/id

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 Parent Directory   -  
 version 2026-10-11 13:08