MAJOR=4
MINOR=34
DEVNAME=tty34
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  *   ˆl–Ü4ý( ©³( 	Å€fàB¦-ÿÂƒl³_†I|¥�+ÂÁ ý    /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * Inspired by original work from pxa2xx-regs.h by Nicolas Pitre
 * Copyright (C) 2014 Robert Jarzmik
 */

#ifndef __DT_BINDINGS_CLOCK_PXA2XX_H__
#define __DT_BINDINGS_CLOCK_PXA2XX_H__

#define CLK_NONE 0
#define CLK_1WIRE 1
#define CLK_AC97 2
#define CLK_AC97CONF 3
#define CLK_ASSP 4
#define CLK_BOOT 5
#define CLK_BTUART 6
#define CLK_CAMERA 7
#define CLK_CIR 8
#define CLK_CORE 9
#define CLK_DMC 10
#define CLK_FFUART 11
#define CLK_FICP 12
#define CLK_GPIO 13
#define CLK_HSIO2 14
#define CLK_HWUART 15
#define CLK_I2C 16
#define CLK_I2S 17
#define CLK_IM 18
#define CLK_INC 19
#define CLK_ISC 20
#define CLK_KEYPAD 21
#define CLK_LCD 22
#define CLK_MEMC 23
#define CLK_MEMSTK 24
#define CLK_MINI_IM 25
#define CLK_MINI_LCD 26
#define CLK_MMC 27
#define CLK_MMC1 28
#define CLK_MMC2 29
#define CLK_MMC3 30
#define CLK_MSL 31
#define CLK_MSL0 32
#define CLK_MVED 33
#define CLK_NAND 34
#define CLK_NSSP 35
#define CLK_OSTIMER 36
#define CLK_PWM0 37
#define CLK_PWM1 38
#define CLK_PWM2 39
#define CLK_PWM3 40
#define CLK_PWRI2C 41
#define CLK_PXA300_GCU 42
#define CLK_PXA320_GCU 43
#define CLK_SMC 44
#define CLK_SSP 45
#define CLK_SSP1 46
#define CLK_SSP2 47
#define CLK_SSP3 48
#define CLK_SSP4 49
#define CLK_STUART 50
#define CLK_TOUCH 51
#define CLK_TPM 52
#define CLK_UDC 53
#define CLK_USB 54
#define CLK_USB2 55
#define CLK_USBH 56
#define CLK_USBHOST 57
#define CLK_USIM 58
#define CLK_USIM1 59
#define CLK_USMI0 60
#define CLK_OSC32k768 61
#define CLK_MAX 62

#endif
     ˆ¿Ãƒq÷ž¾ÂÁ L    /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
/*
 * Copyright(c) 2016 - 2018 Intel Corporation.
 */

#ifndef IB_HDRS_H
#define IB_HDRS_H

#include <linux/types.h>
#include <asm/unaligned.h>
#include <rdma/ib_verbs.h>

#define IB_SEQ_NAK	(3 << 29)

/* AETH NAK opcode values */
#define IB_RNR_NAK                      0x20
#define IB_NAK_PSN_ERROR                0x60
#define IB_NAK_INVALID_REQUEST          0x61
#define IB_NAK_REMOTE_ACCESS_ERROR      0x62
#define IB_NAK_REMOTE_OPERATIONAL_ERROR 0x63
#define IB_NAK_INVALID_RD_REQUEST       0x64

#define IB_BTH_REQ_ACK		BIT(31)
#define IB_BTH_SOLICITED	BIT(23)
#define IB_BTH_MIG_REQ		BIT(22)

#define IB_GRH_VERSION		6
#define IB_GRH_VERSION_MASK	0xF
#define IB_GRH_VERSION_SHIFT	28
#define IB_GRH_TCLASS_MASK	0xFF
#define IB_GRH_TCLASS_SHIFT	20
#define IB_GRH_FLOW_MASK	0xFFFFF
#define IB_GRH_FLOW_SHIFT	0
#define IB_GRH_NEXT_HDR		0x1B
#define IB_FECN_SHIFT 31
#define IB_FECN_MASK 1
#define IB_FECN_SMASK BIT(IB_FECN_SHIFT)
#define IB_BECN_SHIFT 30
#define IB_BECN_MASK 1
#define IB_BECN_SMASK BIT(IB_BECN_SHIFT)

#define IB_AETH_CREDIT_SHIFT	24
#define IB_AETH_CREDIT_MASK	0x1F
#define IB_AETH_CREDIT_INVAL	0x1F
#define IB_AETH_NAK_SHIFT	29
#define IB_MSN_MASK		0xFFFFFF

struct ib_reth {
	__be64 vaddr;        /* potentially unaligned */
	__be32 rkey;
	__be32 length;
} __packed;

struct ib_atomic_eth {
	__be64 vaddr;        /* potentially unaligned */
	__be32 rkey;
	__be64 swap_data;    /* potentially unaligned */
	__be64 compare_data; /* potentially unaligned */
} __packed;

#include <rdma/tid_rdma_defs.h>

union ib_ehdrs {
	struct {
		__be32 deth[2];
		__be32 imm_data;
	} ud;
	struct {
		struct ib_reth reth;
		__be32 imm_data;
	} rc;
	struct {
		__be32 aeth;
		__be64 atomic_ack_eth; /* potentially unaligned */
	} __packed at;
	__be32 imm_data;
	__be32 aeth;
	__be32 ieth;
	struct ib_atomic_eth atomic_eth;
	/* TID RDMA headers */
	union {
		struct tid_rdma_read_req r_req;
		struct tid_rdma_read_resp r_rsp;
		struct tid_rdma_write_req w_req;
		struct tid_rdma_write_resp w_rsp;
		struct tid_rdma_write_data w_data;
		struct tid_rdma_resync resync;
		struct tid_rdma_ack ack;
	} tid_rdma;
}  __packed;

struct ib_other_headers {
	__be32 bth[3];
	union ib_ehdrs u;
} __packed;

struct ib_header {
	__be16 lrh[4];
	union {
		struct {
			struct ib_grh grh;
			struct ib_other_headers oth;
		} l;
		struct ib_ot