MAJOR=4 MINOR=0 DEVNAME=tty0 +l4( (  fB- ^q_I|+?/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * DA9055 declarations for DA9055 PMICs. * * Copyright(c) 2012 Dialog Semiconductor Ltd. * * Author: David Dajun Chen */ #ifndef __DA9055_REG_H #define __DA9055_REG_H /* * PMIC registers */ /* PAGE0 */ #define DA9055_REG_PAGE_CON 0x00 /* System Control and Event Registers */ #define DA9055_REG_STATUS_A 0x01 #define DA9055_REG_STATUS_B 0x02 #define DA9055_REG_FAULT_LOG 0x03 #define DA9055_REG_EVENT_A 0x04 #define DA9055_REG_EVENT_B 0x05 #define DA9055_REG_EVENT_C 0x06 #define DA9055_REG_IRQ_MASK_A 0x07 #define DA9055_REG_IRQ_MASK_B 0x08 #define DA9055_REG_IRQ_MASK_C 0x09 #define DA9055_REG_CONTROL_A 0x0A #define DA9055_REG_CONTROL_B 0x0B #define DA9055_REG_CONTROL_C 0x0C #define DA9055_REG_CONTROL_D 0x0D #define DA9055_REG_CONTROL_E 0x0E #define DA9055_REG_PD_DIS 0x0F /* GPIO Control Registers */ #define DA9055_REG_GPIO0_1 0x10 #define DA9055_REG_GPIO2 0x11 #define DA9055_REG_GPIO_MODE0_2 0x12 /* Regulator Control Registers */ #define DA9055_REG_BCORE_CONT 0x13 #define DA9055_REG_BMEM_CONT 0x14 #define DA9055_REG_LDO1_CONT 0x15 #define DA9055_REG_LDO2_CONT 0x16 #define DA9055_REG_LDO3_CONT 0x17 #define DA9055_REG_LDO4_CONT 0x18 #define DA9055_REG_LDO5_CONT 0x19 #define DA9055_REG_LDO6_CONT 0x1A /* GP-ADC Control Registers */ #define DA9055_REG_ADC_MAN 0x1B #define DA9055_REG_ADC_CONT 0x1C #define DA9055_REG_VSYS_MON 0x1D #define DA9055_REG_ADC_RES_L 0x1E #define DA9055_REG_ADC_RES_H 0x1F #define DA9055_REG_VSYS_RES 0x20 #define DA9055_REG_ADCIN1_RES 0x21 #define DA9055_REG_ADCIN2_RES 0x22 #define DA9055_REG_ADCIN3_RES 0x23 /* Sequencer Control Registers */ #define DA9055_REG_EN_32K 0x35 /* Regulator Setting Registers */ #define DA9055_REG_BUCK_LIM 0x37 #define DA9055_REG_BCORE_MODE 0x38 #define DA9055_REG_VBCORE_A 0x39 #define DA9055_REG_VBMEM_A 0x3A #define DA9055_REG_VLDO1_A 0x3B #define DA9055_REG_VLDO2_A 0x3C #define DA9055_REG_VLDO3_A 0x3D #define DA9055_REG_VLDO4_A 0x3E #define DA9055_REG_VLDO5_A 0x3F #define DA9055_REG_VLDO6_A 0x40 #define DA9055_REG_VBCORE_B 0x41 #define DA9055_REG_VBMEM_B 0x42 #define DA9055_REG_VLDO1_B 0x43 #define DA9055_REG_VLDO2_B 0x44 #define DA9055_REG_VLDO3_B 0x45 #define DA9055_REG_VLDO4_B 0x46 #define DA9055_REG_VLDO5_B 0x47 #define DA9055_REG_VLDO6_B 0x48 /* GP-ADC Threshold Registers */ #define DA9055_REG_AUTO1_HIGH 0x49 #define DA9055_REG_AUTO1_LOW 0x4A #define DA9055_REG_AUTO2_HIGH 0x4B #define DA9055_REG_AUTO2_LOW 0x4C #define DA9055_REG_AUTO3_HIGH 0x4D #define DA9055_REG_AUTO3_LOW 0x4E /* OTP */ #define DA9055_REG_OPT_COUNT 0x50 #define DA9055_REG_OPT_ADDR 0x51 #define DA9055_REG_OPT_DATA 0x52 /* RTC Calendar and Alarm Registers */ #define DA9055_REG_COUNT_S 0x53 #define DA9055_REG_COUNT_MI 0x54 #define DA9055_REG_COUNT_H 0x55 #define DA9055_REG_COUNT_D 0x56 #define DA9055_REG_COUNT_MO 0x57 #define DA9055_REG_COUNT_Y 0x58 #define DA9055_REG_ALARM_MI 0x59 #define DA9055_REG_ALARM_H 0x5A #define DA9055_REG_ALARM_D 0x5B #define DA9055_REG_ALARM_MO 0x5C #define DA9055_REG_ALARM_Y 0x5D #define DA9055_REG_SECOND_A 0x5E #define DA9055_REG_SECOND_B 0x5F #define DA9055_REG_SECOND_C 0x60 #define DA9055_REG_SECOND_D 0x61 /* Customer Trim and Configuration */ #define DA9055_REG_T_OFFSET 0x63 #define DA9055_REG_INTERFACE 0x64 #define DA9055_REG_CONFIG_A 0x65 #define DA9055_REG_CONFIG_B 0x66 #define DA9055_REG_CONFIG_C 0x67 #define DA9055_REG_CONFIG_D 0x68 #define DA9055_REG_CONFIG_E 0x69 #define DA9055_REG_TRIM_CLDR 0x6F /* General Purpose Registers */ #define DA9055_REG_GP_ID_0 0x70 #define DA9055_REG_GP_ID_1 0x71 #define DA9055_REG_GP_ID_2 0x72 #define DA9055_REG_GP_ID_3 0x73 #define DA9055_REG_GP_ID_4 0x74 #define DA9055_REG_GP_ID_5 0x75 #define DA9055_REG_GP_ID_6 0x76 #define DA9055_REG_GP_ID_7 0x77 #define DA9055_REG_GP_ID_8 0x78 #define DA9055_REG_GP_ID_9 0x79 #define DA9055_REG_GP_ID_10 0x7A #define DA9055_REG_GP