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Index of /anon_sym/anon/sys/dev/char/4:12/subsystem/tty54
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ƒ Œƒa–Ðz¾””ÔD¨ Å Œµq¦TÅ£Ê ^ %// SPDX-License-Identifier: GPL-2.0-only
/// This semantic patch looks for kmalloc etc that are not followed by a
/// NULL check. It only gives a report in the case where there is some
/// error handling code later in the function, which may be helpful
/// in determining what the error handling code for the call to kmalloc etc
/// should be.
///
// Confidence: High
// Copyright: (C) 2010 Nicolas Palix, DIKU.
// Copyright: (C) 2010 Julia Lawall, DIKU.
// Copyright: (C) 2010 Gilles Muller, INRIA/LiP6.
// URL: http://coccinelle.lip6.fr/
// Comments:
// Options: --no-includes --include-headers
virtual context
virtual org
virtual report
@withtest@
expression x;
position p;
identifier f,fld;
@@
x@p = f(...);
... when != x->fld
\(x == NULL \| x != NULL\)
@fixed depends on context && !org && !report@
expression x,x1;
position p1 != withtest.p;
statement S;
position any withtest.p;
identifier f;
@@
*x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...);
...
*x1@p = f(...);
if (!x1) S
// ------------------------------------------------------------------------
@rfixed depends on (org || report) && !context exists@
expression x,x1;
position p1 != withtest.p;
position p2;
statement S;
position any withtest.p;
identifier f;
@@
x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...);
...
x1@p = f@p2(...);
if (!x1) S
@script:python depends on org@
p1 << rfixed.p1;
p2 << rfixed.p2;
@@
cocci.print_main("alloc call",p1)
cocci.print_secs("possible model",p2)
@script:python depends on report@
p1 << rfixed.p1;
p2 << rfixed.p2;
@@
msg = "alloc with no test, possible model on line %s" % (p2[0].line)
coccilib.report.print_report(p1[0],msg)
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ƒ ‚_†I|¥+¿Ë T -/* SPDX-License-Identifier: GPL-2.0 */
/*
* This header provides clock numbers for the ingenic,x1830-cgu DT binding.
*
* They are roughly ordered as:
* - external clocks
* - PLLs
* - muxes/dividers in the order they appear in the x1830 programmers manual
* - gates in order of their bit in the CLKGR* registers
*/
#ifndef __DT_BINDINGS_CLOCK_X1830_CGU_H__
#define __DT_BINDINGS_CLOCK_X1830_CGU_H__
#define X1830_CLK_EXCLK 0
#define X1830_CLK_RTCLK 1
#define X1830_CLK_APLL 2
#define X1830_CLK_MPLL 3
#define X1830_CLK_EPLL 4
#define X1830_CLK_VPLL 5
#define X1830_CLK_OTGPHY 6
#define X1830_CLK_SCLKA 7
#define X1830_CLK_CPUMUX 8
#define X1830_CLK_CPU 9
#define X1830_CLK_L2CACHE 10
#define X1830_CLK_AHB0 11
#define X1830_CLK_AHB2PMUX 12
#define