0x0 YˆÑÓ ƒy÷EÐÃÕ# Y/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2013, The Linux Foundation. All rights reserved. */ #ifndef _DT_BINDINGS_CLK_MSM_GCC_8960_H #define _DT_BINDINGS_CLK_MSM_GCC_8960_H #define AFAB_CLK_SRC 0 #define AFAB_CORE_CLK 1 #define SFAB_MSS_Q6_SW_A_CLK 2 #define SFAB_MSS_Q6_FW_A_CLK 3 #define QDSS_STM_CLK 4 #define SCSS_A_CLK 5 #define SCSS_H_CLK 6 #define SCSS_XO_SRC_CLK 7 #define AFAB_EBI1_CH0_A_CLK 8 #define AFAB_EBI1_CH1_A_CLK 9 #define AFAB_AXI_S0_FCLK 10 #define AFAB_AXI_S1_FCLK 11 #define AFAB_AXI_S2_FCLK 12 #define AFAB_AXI_S3_FCLK 13 #define AFAB_AXI_S4_FCLK 14 #define SFAB_CORE_CLK 15 #define SFAB_AXI_S0_FCLK 16 #define SFAB_AXI_S1_FCLK 17 #define SFAB_AXI_S2_FCLK 18 #define SFAB_AXI_S3_FCLK 19 #define SFAB_AXI_S4_FCLK 20 #define SFAB_AHB_S0_FCLK 21 #define SFAB_AHB_S1_FCLK 22 #define SFAB_AHB_S2_FCLK 23 #define SFAB_AHB_S3_FCLK 24 #define SFAB_AHB_S4_FCLK 25 #define SFAB_AHB_S5_FCLK 26 #define SFAB_AHB_S6_FCLK 27 #define SFAB_AHB_S7_FCLK 28 #define QDSS_AT_CLK_SRC 29 #define QDSS_AT_CLK 30 #define QDSS_TRACECLKIN_CLK_SRC 31 #define QDSS_TRACECLKIN_CLK 32 #define QDSS_TSCTR_CLK_SRC 33 #define QDSS_TSCTR_CLK 34 #define SFAB_ADM0_M0_A_CLK 35 #define SFAB_ADM0_M1_A_CLK 36 #define SFAB_ADM0_M2_H_CLK 37 #define ADM0_CLK 38 #define ADM0_PBUS_CLK 39 #define MSS_XPU_CLK 40 #define IMEM0_A_CLK 41 #define QDSS_H_CLK 42 #define PCIE_A_CLK 43 #define PCIE_AUX_CLK 44 #define PCIE_PHY_REF_CLK 45 #define PCIE_H_CLK 46 #define SFAB_CLK_SRC 47 #define MAHB0_CLK 48 #define Q6SW_CLK_SRC 49 #define Q6SW_CLK 50 #define Q6FW_CLK_SRC 51 #define Q6FW_CLK 52 #define SFAB_MSS_M_A_CLK 53 #define SFAB_USB3_M_A_CLK 54 #define SFAB_LPASS_Q6_A_CLK 55 #define SFAB_AFAB_M_A_CLK 56 #define AFAB_SFAB_M0_A_CLK 57 #define AFAB_SFAB_M1_A_CLK 58 #define SFAB_SATA_S_H_CLK 59 #define DFAB_CLK_SRC 60 #define DFAB_CLK 61 #define SFAB_DFAB_M_A_CLK 62 #define DFAB_SFAB_M_A_CLK 63 #define DFAB_SWAY0_H_CLK 64 #define DFAB_SWAY1_H_CLK 65 #define DFAB_ARB0_H_CLK 66 #define DFAB_ARB1_H_CLK 67 #define PPSS_H_CLK 68 #define PPSS_PROC_CLK 69 #define PPSS_TIMER0_CLK 70 #define PPSS_TIMER1_CLK 71 #define PMEM_A_CLK 72 #define DMA_BAM_H_CLK 73 #define SIC_H_CLK 74 #define SPS_TIC_H_CLK 75 #define SLIMBUS_H_CLK 76 #define SLIMBUS_XO_SRC_CLK 77 #define CFPB_2X_CLK_SRC 78 #define CFPB_CLK 79 #define CFPB0_H_CLK 80 #define CFPB1_H_CLK 81 #define CFPB2_H_CLK 82 #define SFAB_CFPB_M_H_CLK 83 #define CFPB_MASTER_H_CLK 84 #define SFAB_CFPB_S_H_CLK 85 #define CFPB_SPLITTER_H_CLK 86 #define TSIF_H_CLK 87 #define TSIF_INACTIVITY_TIMERS_CLK 88 #define TSIF_REF_SRC 89 #define TSIF_REF_CLK 90 #define CE1_H_CLK 91 #define CE1_CORE_CLK 92 #define CE1_SLEEP_CLK 93 #define CE2_H_CLK 94 #define CE2_CORE_CLK 95 #define SFPB_H_CLK_SRC 97 #define SFPB_H_CLK 98 #define SFAB_SFPB_M_H_CLK 99 #define SFAB_SFPB_S_H_CLK 100 #define RPM_PROC_CLK 101 #define RPM_BUS_H_CLK 102 #define RPM_SLEEP_CLK 103 #define RPM_TIMER_CLK 104 #define RPM_MSG_RAM_H_CLK 105 #define PMIC_ARB0_H_CLK 106 #define PMIC_ARB1_H_CLK 107 #define PMIC_SSBI2_SRC 108 #define PMIC_SSBI2_CLK 109 #define SDC1_H_CLK 110 #define SDC2_H_CLK 111 #define SDC3_H_CLK 112 #define SDC4_H_CLK 113 #define SDC5_H_CLK 114 #define SDC1_SRC 115 #define SDC2_SRC 116 #define SDC3_SRC 117 #define SDC4_SRC 118 #define SDC5_SRC 119 #define SDC1_CLK 120 #define SDC2_CLK 121 #define SDC3_CLK 122 #define SDC4_CLK 123 #define SDC5_CLK 124 #define DFAB_A2_H_CLK 125 #define USB_HS1_H_CLK 126 #define USB_HS1_XCVR_SRC 127 #define USB_HS1_XCVR_CLK 128 #define USB_HSIC_H_CLK 129 #define USB_HSIC_XCVR_FS_SRC 130 #define USB_HSIC_XCVR_FS_CLK 131 #define USB_HSIC_SYSTEM_CLK_SRC 132 #define USB_HSIC_SYSTEM_CLK 133 #define CFPB0_C0_H_CLK 134 #define CFPB0_C1_H_CLK 1