platform:serial8250
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  *   ˆl–Ü4ý( ©³( 	Å€fàB¦-ÿÂ403_†I|¥�+ÂÁ “    /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
#ifndef _UAPI_LINUX_SIGNAL_H
#define _UAPI_LINUX_SIGNAL_H

#include <asm/signal.h>
#include <asm/siginfo.h>

#define SS_ONSTACK	1
#define SS_DISABLE	2

/* bit-flags */
#define SS_AUTODISARM	(1U << 31)	/* disable sas during sighandling */
/* mask for all SS_xxx flags */
#define SS_FLAG_BITS	SS_AUTODISARM

#endif /* _UAPI_LINUX_SIGNAL_H */
     ˆ¿Ãƒ¾ÂÁ ò    /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
/*
 * This file is provided under a dual BSD/GPLv2 license.  When using or
 * redistributing this file, you may do so under either license.
 *
 * Copyright(c) 2018 Intel Corporation
 */

#ifndef __INCLUDE_SOUND_SOF_XTENSA_H__
#define __INCLUDE_SOUND_SOF_XTENSA_H__

#include <sound/sof/header.h>

/*
 * Architecture specific debug
 */

/* Xtensa Firmware Oops data */
struct sof_ipc_dsp_oops_xtensa {
	struct sof_ipc_dsp_oops_arch_hdr arch_hdr;
	struct sof_ipc_dsp_oops_plat_hdr plat_hdr;
	uint32_t exccause;
	uint32_t excvaddr;
	uint32_t ps;
	uint32_t epc1;
	uint32_t epc2;
	uint32_t epc3;
	uint32_t epc4;
	uint32_t epc5;
	uint32_t epc6;
	uint32_t epc7;
	uint32_t eps2;
	uint32_t eps3;
	uint32_t eps4;
	uint32_t eps5;
	uint32_t eps6;
	uint32_t eps7;
	uint32_t depc;
	uint32_t intenable;
	uint32_t interrupt;
	uint32_t sar;
	uint32_t debugcause;
	uint32_t windowbase;
	uint32_t windowstart;
	uint32_t excsave1;
	uint32_t ar[];
}  __packed;

#endif
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›    	<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01//EN" "http://www.w3.org/TR/html4/strict.dtd">
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 <head>
  <title>Index of /FSS-OZR/root/lib/modules/5.14.0-687.31.1.el9_8.x86_64/source/include/drm/intel</title>
 </head>
 <body>
<h1>Index of /FSS-OZR/root/lib/modules/5.14.0-687.31.1.el9_8.x86_64/source/include/drm/intel</h1>
  <table>
   <tr><th valign="top">&nbsp;</th><th><a href="?C=N;O=D">Name</a></th><th><a href="?C=M;O=A">Last modified</a></th><th><a href="?C=S;O=A">Size</a></th><th><a href="?C=D;O=A">Description</a></th></tr>
   <tr><th colspan="5"><hr></th></tr>
<tr><td valign="top">&nbsp;</td><td><a href="/FSS-OZR/root/lib/modules/5.14.0-687.31.1.el9_8.x86_64/source/include/drm/">Parent Directory</a>       </td><td>&nbsp;</td><td align="right">  - </td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="i915_component.h">i915_component.h</a>       </td><td align="right">2026-08-01 06:03  </td><td align="right">1.8K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="i915_drm.h">i915_drm.h</a>             </td><td align="right">2026-08-01 06:03  </td><td align="right">3.6K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="i915_gsc_proxy_mei_interface.h">i915_gsc_proxy_mei_i..&gt;</a></td><td align="right">2026-08-01 06:03  </td><td align="right">1.5K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="i915_hdcp_interface.h">i915_hdcp_interface.h</a>  </td><td align="right">2026-08-01 06:03  </td><td align="right"> 16K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="i915_pxp_tee_interface.h">i915_pxp_tee_interfa..&gt;</a></td><td align="right">2026-08-01 06:03  </td><td align="right">1.3K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="intel-gtt.h">intel-gtt.h</a>            </td><td align="right">2026-08-01 06:03  </td><td align="right">1.1K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="intel_lb_mei_interface.h">intel_lb_mei_interfa..&gt;</a></td><td align="right">2026-08-01 06:03  </td><td align="right">2.4K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="intel_lpe_audio.h">intel_lpe_audio.h</a>      </td><td align="right">2026-08-01 06:03  </td><td align="right">1.7K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="pciids.h">pciids.h</a>               </td><td align="right">2026-08-01 06:03  </td><td align="right"> 30K</td><td>&nbsp;</t