01 li~ Je8q 1h 0File not found.  ·O/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * System Control Driver * * Copyright (C) 2012 Freescale Semiconductor, Inc. * Copyright (C) 2012 Linaro Ltd. * * Author: Dong Aisheng */ #ifndef __LINUX_MFD_SYSCON_H__ #define __LINUX_MFD_SYSCON_H__ #include #include struct device_node; #ifdef CONFIG_MFD_SYSCON extern struct regmap *device_node_to_regmap(struct device_node *np); extern struct regmap *syscon_node_to_regmap(struct device_node *np); extern struct regmap *syscon_regmap_lookup_by_compatible(const char *s); extern struct regmap *syscon_regmap_lookup_by_phandle( struct device_node *np, const char *property); extern struct regmap *syscon_regmap_lookup_by_phandle_args( struct device_node *np, const char *property, int arg_count, unsigned int *out_args); extern struct regmap *syscon_regmap_lookup_by_phandle_optional( struct device_node *np, const char *property); #else static inline struct regmap *device_node_to_regmap(struct device_node *np) { return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_node_to_regmap(struct device_node *np) { return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_regmap_lookup_by_compatible(const char *s) { return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_regmap_lookup_by_phandle( struct device_node *np, const char *property) { return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_regmap_lookup_by_phandle_args( struct device_node *np, const char *property, int arg_count, unsigned int *out_args) { return ERR_PTR(-ENOTSUPP); } static inline struct regmap *syscon_regmap_lookup_by_phandle_optional( struct device_node *np, const char *property) { return NULL; } #endif #endif /* __LINUX_MFD_SYSCON_H__ */  d?*O/* SPDX-License-Identifier: GPL-2.0 */ #ifndef __IO_PGTABLE_H #define __IO_PGTABLE_H #include #include /* * Public API for use by IOMMU drivers */ enum io_pgtable_fmt { ARM_32_LPAE_S1, ARM_32_LPAE_S2, ARM_64_LPAE_S1, ARM_64_LPAE_S2, ARM_V7S, ARM_MALI_LPAE, AMD_IOMMU_V1, AMD_IOMMU_V2, APPLE_DART, IO_PGTABLE_NUM_FMTS, }; /** * struct iommu_flush_ops - IOMMU callbacks for TLB and page table management. * * @tlb_flush_all: Synchronously invalidate the entire TLB context. * @tlb_flush_walk: Synchronously invalidate all intermediate TLB state * (sometimes referred to as the "walk cache") for a virtual * address range. * @tlb_add_page: Optional callback to queue up leaf TLB invalidation for a * single page. IOMMUs that cannot batch TLB invalidation * operations efficiently will typically issue them here, but * others may decide to update the iommu_iotlb_gather structure * and defer the invalidation until iommu_iotlb_sync() instead. * * Note that these can all be called in atomic context and must therefore * not block. */ struct iommu_flush_ops { void (*tlb_flush_all)(void *cookie); void (*tlb_flush_walk)(unsigned long iova, size_t size, size_t granule, void *cookie); void (*tlb_add_page)(struct iommu_iotlb_gather *gather, unsigned long iova, size_t granule, void *cookie); }; /** * struct io_pgtable_cfg - Configuration data for a set of page tables. * * @quirks: A bitmap of hardware quirks that require some special * action by the low-level page table allocator. * @pgsize_bitmap: A bitmap of page sizes supported by this set of page * tables. * @ias: Input address (iova) size, in bits. * @oas: Output address (paddr) size, in bits. * @coherent_walk A flag to indicate whether or not page table walks made * by the IOMMU are coherent with the CPU caches. * @tlb: TLB management