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<h1>Index of /FSS-OZR/root/lib/firmware/intel/ipu</h1>
  <table>
   <tr><th valign="top">&nbsp;</th><th><a href="?C=N;O=A">Name</a></th><th><a href="?C=M;O=A">Last modified</a></th><th><a href="?C=S;O=A">Size</a></th><th><a href="?C=D;O=A">Description</a></th></tr>
   <tr><th colspan="5"><hr></th></tr>
<tr><td valign="top">&nbsp;</td><td><a href="/FSS-OZR/root/lib/firmware/intel/">Parent Directory</a>       </td><td>&nbsp;</td><td align="right">  - </td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="shisp_2401a0_v21.bin.xz">shisp_2401a0_v21.bin.xz</a></td><td align="right">2026-05-19 08:33  </td><td align="right">1.1M</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="shisp_2400b0_v21.bin.xz">shisp_2400b0_v21.bin.xz</a></td><td align="right">2026-05-19 08:33  </td><td align="right">1.0M</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="irci_irci_ecr-master_20161208_0213_20170112_1500.bin.xz">irci_irci_ecr-master..&gt;</a></td><td align="right">2026-05-19 08:33  </td><td align="right">239K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="ipu6_fw.bin.xz">ipu6_fw.bin.xz</a>         </td><td align="right">2026-05-19 08:33  </td><td align="right">202K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="ipu6epmtl_fw.bin.xz">ipu6epmtl_fw.bin.xz</a>    </td><td align="right">2026-05-19 08:33  </td><td align="right">202K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="ipu6ep_fw.bin.xz">ipu6ep_fw.bin.xz</a>       </td><td align="right">2026-05-19 08:33  </td><td align="right">201K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="ipu6epadln_fw.bin.xz">ipu6epadln_fw.bin.xz</a>   </td><td align="right">2026-05-19 08:33  </td><td align="right">201K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="ipu6se_fw.bin.xz">ipu6se_fw.bin.xz</a>       </td><td align="right">2026-05-19 08:33  </td><td align="right">174K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="ipu7ptl_fw.bin.xz">ipu7ptl_fw.bin.xz</a>      </td><td align="right">2026-05-19 08:33  </td><td align="right">123K</td><td>&nbsp;</td></tr>
<tr><td valign="top">&nbsp;</td><td><a href="ipu7_fw.bin.xz">ipu7_fw.bin.xz</a>         </td><td align="right">2026-05-19 08:33  </td><td align="right">121K</td><td>&nbsp;</td></tr>
   <tr><th colspan="5"><hr></th></tr>
</table>
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     ˆÃÅƒq–…Â¿Ç Æ    /* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
 */
#ifndef __LINUX_ND_H__
#define __LINUX_ND_H__
#include <linux/fs.h>
#include <linux/ndctl.h>
#include <linux/device.h>
#include <linux/badblocks.h>
#include <linux/perf_event.h>

enum nvdimm_event {
	NVDIMM_REVALIDATE_POISON,
	NVDIMM_REVALIDATE_REGION,
};

enum nvdimm_claim_class {
	NVDIMM_CCLASS_NONE,
	NVDIMM_CCLASS_BTT,
	NVDIMM_CCLASS_BTT2,
	NVDIMM_CCLASS_PFN,
	NVDIMM_CCLASS_DAX,
	NVDIMM_CCLASS_UNKNOWN,
};

#define NVDIMM_EVENT_VAR(_id)  event_attr_##_id
#define NVDIMM_EVENT_PTR(_id)  (&event_attr_##_id.attr.attr)

#define NVDIMM_EVENT_ATTR(_name, _id)				\
	PMU_EVENT_ATTR(_name, NVDIMM_EVENT_VAR(_id), _id,	\
			nvdimm_events_sysfs_show)

/* Event attribute array index */
#define NVDIMM_PMU_FORMAT_ATTR	0
#define NVDIMM_PMU_EVENT_ATTR	1
#define NVDIMM_PMU_CPUMASK_ATTR	2
#define NVDIMM_PMU_NULL_ATTR	3

/**
 * struct nvdimm_pmu - data structure for nvdimm perf driver
 * @pmu: pmu data structure for nvdimm performance stats.
 * @dev: nvdimm device pointer.
 * @cpu: designated cpu for counter access.
 * @node: node for cpu hotplug notifier link.
 * @cpuhp_state: state for cpu hotplug notification.
 * @arch_cpumask: cpumask to get designated cpu for counter access.
 */
struct nvdimm_pmu {
	struct pmu pmu;
	struct device *dev;
	int cpu;
	struct hlist_node node;
	enum cpuhp_st