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Index of /FSS-OZR/root/usr/lib/firmware/qcom/sm8550
Index of /FSS-OZR/root/usr/lib/firmware/qcom/sm8550
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ƒ €kÏ¾Ò D m/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __QCOM_SMEM_STATE__
#define __QCOM_SMEM_STATE__
#include
struct device_node;
struct qcom_smem_state;
struct qcom_smem_state_ops {
int (*update_bits)(void *, u32, u32);
};
#ifdef CONFIG_QCOM_SMEM_STATE
struct qcom_smem_state *qcom_smem_state_get(struct device *dev, const char *con_id, unsigned *bit);
struct qcom_smem_state *devm_qcom_smem_state_get(struct device *dev, const char *con_id, unsigned *bit);
void qcom_smem_state_put(struct qcom_smem_state *);
int qcom_smem_state_update_bits(struct qcom_smem_state *state, u32 mask, u32 value);
struct qcom_smem_state *qcom_smem_state_register(struct device_node *of_node, const struct qcom_smem_state_ops *ops, void *data);
void qcom_smem_state_unregister(struct qcom_smem_state *state);
#else
static inline struct qcom_smem_state *qcom_smem_state_get(struct device *dev,
const char *con_id, unsigned *bit)
{
return ERR_PTR(-EINVAL);
}
static inline struct qcom_smem_state *devm_qcom_smem_state_get(struct device *dev,
const char *con_id,
unsigned *bit)
{
return ERR_PTR(-EINVAL);
}
static inline void qcom_smem_state_put(struct qcom_smem_state *state)
{
}
static inline int qcom_smem_state_update_bits(struct qcom_smem_state *state,
u32 mask, u32 value)
{
return -EINVAL;
}
static inline struct qcom_smem_state *qcom_smem_state_register(struct device_node *of_node,
const struct qcom_smem_state_ops *ops, void *data)
{
return ERR_PTR(-EINVAL);
}
static inline void qcom_smem_state_unregister(struct qcom_smem_state *state)
{
}
#endif
#endif
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Index of /FSS-OZR/root/sys/bus/acpi/devices/PNP0A03:00/device:0a/physical_node/driver/0000:00:05.0/virtio3
Index of /FSS-OZR/root/sys/bus/acpi/devices/PNP0A03:00/device:0a/physical_node/driver/0000:00:05.0/virtio3