00 +l4( (  fB- ^}_I|+.v/* SPDX-License-Identifier: GPL-2.0-or-later */ #ifndef __SOUND_OPL3_H #define __SOUND_OPL3_H /* * Definitions of the OPL-3 registers. * * Copyright (c) by Jaroslav Kysela , * Hannu Savolainen 1993-1996 * * The OPL-3 mode is switched on by writing 0x01, to the offset 5 * of the right side. * * Another special register at the right side is at offset 4. It contains * a bit mask defining which voices are used as 4 OP voices. * * The percussive mode is implemented in the left side only. * * With the above exceptions the both sides can be operated independently. * * A 4 OP voice can be created by setting the corresponding * bit at offset 4 of the right side. * * For example setting the rightmost bit (0x01) changes the * first voice on the right side to the 4 OP mode. The fourth * voice is made inaccessible. * * If a voice is set to the 2 OP mode, it works like 2 OP modes * of the original YM3812 (AdLib). In addition the voice can * be connected the left, right or both stereo channels. It can * even be left unconnected. This works with 4 OP voices also. * * The stereo connection bits are located in the FEEDBACK_CONNECTION * register of the voice (0xC0-0xC8). In 4 OP voices these bits are * in the second half of the voice. */ #include #include #include #include #include #include #include #include /* * Register numbers for the global registers */ #define OPL3_REG_TEST 0x01 #define OPL3_ENABLE_WAVE_SELECT 0x20 #define OPL3_REG_TIMER1 0x02 #define OPL3_REG_TIMER2 0x03 #define OPL3_REG_TIMER_CONTROL 0x04 /* Left side */ #define OPL3_IRQ_RESET 0x80 #define OPL3_TIMER1_MASK 0x40 #define OPL3_TIMER2_MASK 0x20 #define OPL3_TIMER1_START 0x01 #define OPL3_TIMER2_START 0x02 #define OPL3_REG_CONNECTION_SELECT 0x04 /* Right side */ #define OPL3_LEFT_4OP_0 0x01 #define OPL3_LEFT_4OP_1 0x02 #define OPL3_LEFT_4OP_2 0x04 #define OPL3_RIGHT_4OP_0 0x08 #define OPL3_RIGHT_4OP_1 0x10 #define OPL3_RIGHT_4OP_2 0x20 #define OPL3_REG_MODE 0x05 /* Right side */ #define OPL3_OPL3_ENABLE 0x01 /* OPL3 mode */ #define OPL3_OPL4_ENABLE 0x02 /* OPL4 mode */ #define OPL3_REG_KBD_SPLIT 0x08 /* Left side */ #define OPL3_COMPOSITE_SINE_WAVE_MODE 0x80 /* Don't use with OPL-3? */ #define OPL3_KEYBOARD_SPLIT 0x40 #define OPL3_REG_PERCUSSION 0xbd /* Left side only */ #define OPL3_TREMOLO_DEPTH 0x80 #define OPL3_VIBRATO_DEPTH 0x40 #define OPL3_PERCUSSION_ENABLE 0x20 #define OPL3_BASSDRUM_ON 0x10 #define OPL3_SNAREDRUM_ON 0x08 #define OPL3_TOMTOM_ON 0x04 #define OPL3_CYMBAL_ON 0x02 #define OPL3_HIHAT_ON 0x01 /* * Offsets to the register banks for operators. To get the * register number just add the operator offset to the bank offset * * AM/VIB/EG/KSR/Multiple (0x20 to 0x35) */ #define OPL3_REG_AM_VIB 0x20 #define OPL3_TREMOLO_ON 0x80 #define OPL3_VIBRATO_ON 0x40 #define OPL3_SUSTAIN_ON 0x20 #define OPL3_KSR 0x10 /* Key scaling rate */ #define OPL3_MULTIPLE_MASK 0x0f /* Frequency multiplier */ /* * KSL/Total level (0x40 to 0x55) */ #define OPL3_REG_KSL_LEVEL 0x40 #define OPL3_KSL_MASK 0xc0 /* Envelope scaling bits */ #define OPL3_TOTAL_LEVEL_MASK 0x3f /* Strength (volume) of OP */ /* * Attack / Decay rate (0x60 to 0x75) */ #define OPL3_REG_ATTACK_DECAY 0x60 #define OPL3_ATTACK_MASK 0xf0 #define OPL3_DECAY_MASK 0x0f /* * Sustain level / Release rate (0x80 to 0x95) */ #define OPL3_REG_SUSTAIN_RELEASE 0x80 #define OPL3_SUSTAIN_MASK 0xf0 #define OPL3_RELEASE_MASK 0x0f /* * Wave select (0xE0 to 0xF5) */ #define OPL3_REG_WAVE_SELECT 0xe0 #define OPL3_WAVE_SELECT_MASK 0x07 /* * Offsets to the register banks for voices. Just a