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  $   'ˆÅÄ„M²÷Ãa–İm_J*j"Tâ€vã@¸ÔÅ£Ç 8Ê    '/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
/* QLogic qed NIC Driver
 * Copyright (c) 2015-2017  QLogic Corporation
 * Copyright (c) 2019-2020 Marvell International Ltd.
 */

#ifndef __ETH_COMMON__
#define __ETH_COMMON__

/********************/
/* ETH FW CONSTANTS */
/********************/

#define ETH_HSI_VER_MAJOR		3
#define ETH_HSI_VER_MINOR		11

#define ETH_HSI_VER_NO_PKT_LEN_TUNN         5
/* Maximum number of pinned L2 connections (CIDs) */
#define ETH_PINNED_CONN_MAX_NUM             32

#define ETH_CACHE_LINE_SIZE		64
#define ETH_RX_CQE_GAP			32
#define ETH_MAX_RAMROD_PER_CON		8
#define ETH_TX_BD_PAGE_SIZE_BYTES	4096
#define ETH_RX_BD_PAGE_SIZE_BYTES	4096
#define ETH_RX_CQE_PAGE_SIZE_BYTES	4096
#define ETH_RX_NUM_NEXT_PAGE_BDS	2

#define ETH_MAX_TUNN_LSO_INNER_IPV4_OFFSET	253
#define ETH_MAX_TUNN_LSO_INNER_IPV6_OFFSET	251

#define ETH_TX_MIN_BDS_PER_NON_LSO_PKT			1
#define ETH_TX_MAX_BDS_PER_NON_LSO_PACKET		18
#define ETH_TX_MAX_BDS_PER_LSO_PACKET			255
#define ETH_TX_MAX_LSO_HDR_NBD				4
#define ETH_TX_MIN_BDS_PER_LSO_PKT			3
#define ETH_TX_MIN_BDS_PER_TUNN_IPV6_WITH_EXT_PKT	3
#define ETH_TX_MIN_BDS_PER_IPV6_WITH_EXT_PKT		2
#define ETH_TX_MIN_BDS_PER_PKT_W_LOOPBACK_MODE		2
#define ETH_TX_MIN_BDS_PER_PKT_W_VPORT_FORWARDING	4
#define ETH_TX_MAX_NON_LSO_PKT_LEN		(9700 - (4 + 4 + 12 + 8))
#define ETH_TX_MAX_LSO_HDR_BYTES			510
#define ETH_TX_LSO_WINDOW_BDS_NUM			(18 - 1)
#define ETH_TX_LSO_WINDOW_MIN_LEN			9700
#define ETH_TX_MAX_LSO_PAYLOAD_LEN			0xFE000
#define ETH_TX_NUM_SAME_AS_LAST_ENTRIES			320
#define ETH_TX_INACTIVE_SAME_AS_LAST			0xFFFF

#define ETH_NUM_STATISTIC_COUNTERS			MAX_NUM_VPORTS
#define ETH_NUM_STATISTIC_COUNTERS_DOUBLE_VF_ZONE \
	(ETH_NUM_STATISTIC_COUNTERS - MAX_NUM_VFS / 2)
#define ETH_NUM_STATISTIC_COUNTERS_QUAD_VF_ZONE \
	(ETH_NUM_STATISTIC_COUNTERS - 3 * MAX_NUM_VFS / 4)

#define ETH_RX_MAX_BUFF_PER_PKT		5
#define ETH_RX_BD_THRESHOLD             16

/* Num of MAC/VLAN filters */
#define ETH_NUM_MAC_FILTERS		512
#define ETH_NUM_VLAN_FILTERS		512

/* Approx. multicast constants */
#define ETH_MULTICAST_BIN_FROM_MAC_SEED	0
#define ETH_MULTICAST_MAC_BINS		256
#define ETH_MULTICAST_MAC_BINS_IN_REGS	(ETH_MULTICAST_MAC_BINS / 32)

/* Ethernet vport update constants */
#define ETH_FILTER_RULES_COUNT		10
#define ETH_RSS_IND_TABLE_ENTRIES_NUM	128
#define ETH_RSS_IND_TABLE_MASK_SIZE_REGS    (ETH_RSS_IND_TABLE_ENTRIES_NUM / 32)
#define ETH_RSS_KEY_SIZE_REGS		10
#define ETH_RSS_ENGINE_NUM_K2		207
#define ETH_RSS_ENGINE_NUM_BB		127

/* TPA constants */
#define ETH_TPA_MAX_AGGS_NUM                64
#define ETH_TPA_CQE_START_BW_LEN_LIST_SIZE  2
#define ETH_TPA_CQE_CONT_LEN_LIST_SIZE      6
#define ETH_TPA_CQE_END_LEN_LIST_SIZE       4

/* Control frame check constants */
#define ETH_CTL_FRAME_ETH_TYPE_NUM        4

/* GFS constants */
#define ETH_GFT_TRASHCAN_VPORT         0x1FF	/* GFT drop flow vport number */

/* Destination port mode */
enum dst_port_mode {
	DST_PORT_PHY,
	DST_PORT_LOOPBACK,
	DST_PORT_PHY_LOOPBACK,
	DST_PORT_DROP,
	MAX_DST_PORT_MODE
};

/* Ethernet address type */
enum eth_addr_type {
	BROADCAST_ADDRESS,
	MULTICAST_ADDRESS,
	UNICAST_ADDRESS,
	UNKNOWN_ADDRESS,
	MAX_ETH_ADDR_TYPE
};

struct eth_tx_1st_bd_flags {
	u8 bitfields;
#define ETH_TX_1ST_BD_FLAGS_START_BD_MASK		0x1
#define ETH_TX_1ST_BD_FLAGS_START_BD_SHIFT		0
#define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_MASK	0x1
#define ETH_TX_1ST_BD_FLAGS_FORCE_VLAN_MODE_SHIFT	1
#define ETH_TX_1ST_BD_FLAGS_IP_CSUM_MASK		0x1
#define ETH_TX_1ST_BD_FLAGS_IP_CSUM_SHIFT		2
#define ETH_TX_1ST_BD_FLAGS_L4_CSUM_MASK		0x1
#define ETH_TX_1ST_BD_FLAGS_L4_CSUM_SHIFT		3
#define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_MASK		0x1
#define ETH_TX_1ST_BD_FLAGS_VLAN_INSERTION_SHIFT	4
#define ETH_TX_1ST_BD_FLAGS_LSO_MASK			0x1
#define ETH_TX_1ST_BD_FLAGS_LSO_SHIFT			5
#define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_MASK		0x1
#define ETH_TX_1ST_BD_FLAGS_TUNN_IP_CSUM_SHIFT		6
#define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_MASK		0x1
#define ETH_TX_1ST_BD_FLAGS_TUNN_L4_CSUM_SHIFT		7
};

/* The parsing information d