pci:v00001AF4d00001000sv00001AF4sd00000001bc02sc00i00  O_I|Mdv &K Index of /anon_sym/anon/sys/devices/virtual/tty/tty9/subsystem/tty14

Index of /anon_sym/anon/sys/devices/virtual/tty/tty9/subsystem/tty14

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 power/ 2026-10-13 17:50 -  
 dev 2026-10-13 17:50 4.0K 
 subsystem/ 2026-10-11 21:02 -  
+ l4( (  fD- >_I|+? /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __SVM_H #define __SVM_H #include #include #include /* * 32-bit intercept words in the VMCB Control Area, starting * at Byte offset 000h. */ enum intercept_words { INTERCEPT_CR = 0, INTERCEPT_DR, INTERCEPT_EXCEPTION, INTERCEPT_WORD3, INTERCEPT_WORD4, INTERCEPT_WORD5, MAX_INTERCEPT, }; enum { /* Byte offset 000h (word 0) */ INTERCEPT_CR0_READ = 0, INTERCEPT_CR3_READ = 3, INTERCEPT_CR4_READ = 4, INTERCEPT_CR8_READ = 8, INTERCEPT_CR0_WRITE = 16, INTERCEPT_CR3_WRITE = 16 + 3, INTERCEPT_CR4_WRITE = 16 + 4, INTERCEPT_CR8_WRITE = 16 + 8, /* Byte offset 004h (word 1) */ INTERCEPT_DR0_READ = 32, INTERCEPT_DR1_READ, INTERCEPT_DR2_READ, INTERCEPT_DR3_READ, INTERCEPT_DR4_READ, INTERCEPT_DR5_READ, INTERCEPT_DR6_READ, INTERCEPT_DR7_READ, INTERCEPT_DR0_WRITE = 48, INTERCEPT_DR1_WRITE, INTERCEPT_DR2_WRITE, INTERCEPT_DR3_WRITE, INTERCEPT_DR4_WRITE, INTERCEPT_DR5_WRITE, INTERCEPT_DR6_WRITE, INTERCEPT_DR7_WRITE, /* Byte offset 008h (word 2) */ INTERCEPT_EXCEPTION_OFFSET = 64, /* Byte offset 00Ch (word 3) */ INTERCEPT_INTR = 96, INTERCEPT_NMI, INTERCEPT_SMI, INTERCEPT_INIT, INTERCEPT_VINTR, INTERCEPT_SELECTIVE_CR0, INTERCEPT_STORE_IDTR, INTERCEPT_STORE_GDTR, INTERCEPT_STORE_LDTR, INTERCEPT_STORE_TR, INTERCEPT_LOAD_IDTR, INTERCEPT_LOAD_GDTR, INTERCEPT_LOAD_LDTR, INTERCEPT_LOAD_TR, INTERCEPT_RDTSC, INTERCEPT_RDPMC, INTERCEPT_PUSHF, INTERCEPT_POPF, INTERCEPT_CPUID, INTERCEPT_RSM, INTERCEPT_IRET, INTERCEPT_INTn, INTERCEPT_INVD, INTERCEPT_PAUSE, INTERCEPT_HLT, INTERCEPT_INVLPG, INTERCEPT_INVLPGA, INTERCEPT_IOIO_PROT, INTERCEPT_MSR_PROT, INTERCEPT_TASK_SWITCH, INTERCEPT_FERR_FREEZE, INTERCEPT_SHUTDOWN, /* Byte offset 010h (word 4) */ INTERCEPT_VMRUN = 128, INTERCEPT_VMMCALL, INTERCEPT_VMLOAD, INTERCEPT_VMSAVE, INTERCEPT_STGI, INTERCEPT_CLGI, INTERCEPT_SKINIT, INTERCEPT_RDTSCP, INTERCEPT_ICEBP, INTERCEPT_WBINVD, INTERCEPT_MONITOR, INTERCEPT_MWAIT, INTERCEPT_MWAIT_COND, INTERCEPT_XSETBV, INTERCEPT_RDPRU, TRAP_EFER_WRITE, TRAP_CR0_WRITE, TRAP_CR1_WRITE, TRAP_CR2_WRITE, TRAP_CR3_WRITE, TRAP_CR4_WRITE, TRAP_CR5_WRITE, TRAP_CR6_WRITE, TRAP_CR7_WRITE, TRAP_CR8_WRITE, /* Byte offset 014h (word 5) */ INTERCEPT_INVLPGB = 160, INTERCEPT_INVLPGB_ILLEGAL, INTERCEPT_INVPCID, INTERCEPT_MCOMMIT, INTERCEPT_TLBSYNC, INTERCEPT_IDLE_HLT = 1