0 'ˆ ƒ �·ÂÀÇŸ' Index of /FSS-OZR/root/sys/dev/char/5:0/subsystem/tty24/power

Index of /FSS-OZR/root/sys/dev/char/5:0/subsystem/tty24/power

 NameLast modifiedSizeDescription

 Parent Directory   -  
 runtime_suspended_time 2026-10-12 02:07 4.0K 
 runtime_status 2026-10-12 02:07 4.0K 
 runtime_active_time 2026-10-12 02:07 4.0K 
 control 2026-10-12 02:07 4.0K 
 autosuspend_delay_ms 2026-10-12 02:07 4.0K 

")ˆl–Ðz¾””ÔD¨ ÅåÀ?pN©‹FÿÊ ƒh¹ÁÈ)MAJOR=4 MINOR=29 DEVNAME=tty29 +ˆÇÊ „}¯ÆÁÈ)Æ+/* SPDX-License-Identifier: GPL-2.0-only */ /* * include/video/gbe.h -- SGI GBE (Graphics Back End) * * Copyright (C) 1999 Silicon Graphics, Inc. (Jeffrey Newquist) */ #ifndef __GBE_H__ #define __GBE_H__ struct sgi_gbe { volatile uint32_t ctrlstat; /* general control */ volatile uint32_t dotclock; /* dot clock PLL control */ volatile uint32_t i2c; /* crt I2C control */ volatile uint32_t sysclk; /* system clock PLL control */ volatile uint32_t i2cfp; /* flat panel I2C control */ volatile uint32_t id; /* device id/chip revision */ volatile uint32_t config; /* power on configuration [1] */ volatile uint32_t bist; /* internal bist status [1] */ uint32_t _pad0[0x010000/4 - 8]; volatile uint32_t vt_xy; /* current dot coords */ volatile uint32_t vt_xymax; /* maximum dot coords */ volatile uint32_t vt_vsync; /* vsync on/off */ volatile uint32_t vt_hsync; /* hsync on/off */ volatile uint32_t vt_vblank; /* vblank on/off */ volatile uint32_t vt_hblank; /* hblank on/off */ volatile uint32_t vt_flags; /* polarity of vt signals */ volatile uint32_t vt_f2rf_lock; /* f2rf & framelck y coord */ volatile uint32_t vt_intr01; /* intr 0,1 y coords */ volatile uint32_t vt_intr23; /* intr 2,3 y coords */ volatile uint32_t fp_hdrv; /* flat panel hdrv on/off */ volatile uint32_t fp_vdrv; /* flat panel vdrv on/off */ volatile uint32_t fp_de; /* flat panel de on/off */ volatile uint32_t vt_hpixen; /* intrnl horiz pixel on/off */ volatile uint32_t vt_vpixen; /* intrnl vert pixel on/off */ volatile uint32_t vt_hcmap; /* cmap write (horiz) */ volatile uint32_t vt_vcmap; /* cmap write (vert) */ volatile uint32_t did_start_xy; /* eol/f did/xy reset val */ volatile uint32_t crs_start_xy; /* eol/f crs/xy reset val */ volatile uint32_t vc_start_xy; /* eol/f vc/xy reset val */ uint32_t _pad1[0xffb0/4]; volatile uint32_t ovr_width_tile;/*overlay plane ctrl 0 */ volatile uint32_t ovr_inhwctrl; /* overlay plane ctrl 1 */ volatile uint32_t ovr_control; /* overlay plane ctrl 1 */ uint32_t _pad2[0xfff4/4]; volatile uint32_t frm_size_tile;/* normal plane ctrl 0 */ volatile uint32_t frm_size_pixel;/*normal plane ctrl 1 */ volatile uint32_t frm_inhwctrl; /* normal plane ctrl 2 */ volatile uint32_t frm_c