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  *   ˆl–Ü4ý( ©³( 	Å€fàB¦-ÿÀ803_†I|¥+ÄÃ #    /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * altera.h
 *
 * altera FPGA driver
 *
 * Copyright (C) Altera Corporation 1998-2001
 * Copyright (C) 2010 NetUP Inc.
 * Copyright (C) 2010 Igor M. Liplianin <liplianin@netup.ru>
 */

#ifndef _ALTERA_H_
#define _ALTERA_H_

struct altera_config {
	void *dev;
	u8 *action;
	int (*jtag_io) (void *dev, int tms, int tdi, int tdo);
};

#if defined(CONFIG_ALTERA_STAPL) || \
		(defined(CONFIG_ALTERA_STAPL_MODULE) && defined(MODULE))

extern int altera_init(struct altera_config *config, const struct firmware *fw);
#else

static inline int altera_init(struct altera_config *config,
						const struct firmware *fw)
{
	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
	return 0;
}
#endif /* CONFIG_ALTERA_STAPL */

#endif /* _ALTERA_H_ */
     	ˆ¿Á„uÖ_w¾ÄÃ ?÷     	/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * linux/mfd/wm831x/regulator.h -- Regulator definitons for wm831x
 *
 * Copyright 2009 Wolfson Microelectronics PLC.
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 */

#ifndef __MFD_WM831X_REGULATOR_H__
#define __MFD_WM831X_REGULATOR_H__

/*
 * R16462 (0x404E) - Current Sink 1
 */
#define WM831X_CS1_ENA                          0x8000  /* CS1_ENA */
#define WM831X_CS1_ENA_MASK                     0x8000  /* CS1_ENA */
#define WM831X_CS1_ENA_SHIFT                        15  /* CS1_ENA */
#define WM831X_CS1_ENA_WIDTH                         1  /* CS1_ENA */
#define WM831X_CS1_DRIVE                        0x4000  /* CS1_DRIVE */
#define WM831X_CS1_DRIVE_MASK                   0x4000  /* CS1_DRIVE */
#define WM831X_CS1_DRIVE_SHIFT                      14  /* CS1_DRIVE */
#define WM831X_CS1_DRIVE_WIDTH                       1  /* CS1_DRIVE */
#define WM831X_CS1_SLPENA                       0x1000  /* CS1_SLPENA */
#define WM831X_CS1_SLPENA_MASK                  0x1000  /* CS1_SLPENA */
#define WM831X_CS1_SLPENA_SHIFT                     12  /* CS1_SLPENA */
#define WM831X_CS1_SLPENA_WIDTH                      1  /* CS1_SLPENA */
#define WM831X_CS1_OFF_RAMP_MASK                0x0C00  /* CS1_OFF_RAMP - [11:10] */
#define WM831X_CS1_OFF_RAMP_SHIFT                   10  /* CS1_OFF_RAMP - [11:10] */
#define WM831X_CS1_OFF_RAMP_WIDTH                    2  /* CS1_OFF_RAMP - [11:10] */
#define WM831X_CS1_ON_RAMP_MASK                 0x0300  /* CS1_ON_RAMP - [9:8] */
#define WM831X_CS1_ON_RAMP_SHIFT                     8  /* CS1_ON_RAMP - [9:8] */
#define WM831X_CS1_ON_RAMP_WIDTH                     2  /* CS1_ON_RAMP - [9:8] */
#define WM831X_CS1_ISEL_MASK                    0x003F  /* CS1_ISEL - [5:0] */
#define WM831X_CS1_ISEL_SHIFT                        0  /* CS1_ISEL - [5:0] */
#define WM831X_CS1_ISEL_WIDTH                        6  /* CS1_ISEL - [5:0] */

/*
 * R16463 (0x404F) - Current Sink 2
 */
#define WM831X_CS2_ENA                          0x8000  /* CS2_ENA */
#define WM831X_CS2_ENA_MASK                     0x8000  /* CS2_ENA */
#define WM831X_CS2_ENA_SHIFT                        15  /* CS2_ENA */
#define WM831X_CS2_ENA_WIDTH                         1  /* CS2_ENA */
#define WM831X_CS2_DRIVE                        0x4000  /* CS2_DRIVE */
#define WM831X_CS2_DRIVE_MASK                   0x4000  /* CS2_DRIVE */
#define WM831X_CS2_DRIVE_SHIFT                      14  /* CS2_DRIVE */
#define WM831X_CS2_DRIVE_WIDTH                       1  /* CS2_DRIVE */
#define WM831X_CS2_SLPENA                       0x1000  /* CS2_SLPENA */
#define WM831X_CS2_SLPENA_MASK                  0x1000  /* CS2_SLPENA */
#define WM831X_CS2_SLPENA_SHIFT                     12  /* CS2_SLPENA */
#define WM831X_CS2_SLPENA_WIDTH                      1  /* CS2_SLPENA */
#define WM831X_CS2_OFF_RAMP_MASK                0x0C00  /* CS2_OFF_RAMP - [11:10] */
#define WM831X_CS2_OFF_RAMP_SHIFT                   10  /* CS2_OFF_RAMP - [11:10] */
#define WM831X_CS2_OFF_RAMP_WIDTH                    2  /* CS2_OFF_RAMP - [11:10] */
#define WM831X_CS2_ON_RAMP_MASK                 0x0300  /* CS2_ON_RAMP - [9:8] */
#define WM