0 + l4( (  fB- `u_I|+: /* * Copyright 2005 Stephane Marchesin. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef __NOUVEAU_DRM_H__ #define __NOUVEAU_DRM_H__ #define DRM_NOUVEAU_EVENT_NVIF 0x80000000 #include "drm.h" #if defined(__cplusplus) extern "C" { #endif #define NOUVEAU_GETPARAM_PCI_VENDOR 3 #define NOUVEAU_GETPARAM_PCI_DEVICE 4 #define NOUVEAU_GETPARAM_BUS_TYPE 5 #define NOUVEAU_GETPARAM_FB_SIZE 8 #define NOUVEAU_GETPARAM_AGP_SIZE 9 #define NOUVEAU_GETPARAM_CHIPSET_ID 11 #define NOUVEAU_GETPARAM_VM_VRAM_BASE 12 #define NOUVEAU_GETPARAM_GRAPH_UNITS 13 #define NOUVEAU_GETPARAM_PTIMER_TIME 14 #define NOUVEAU_GETPARAM_HAS_BO_USAGE 15 #define NOUVEAU_GETPARAM_HAS_PAGEFLIP 16 /* * NOUVEAU_GETPARAM_EXEC_PUSH_MAX - query max pushes through getparam * * Query the maximum amount of IBs that can be pushed through a single * &drm_nouveau_exec structure and hence a single &DRM_IOCTL_NOUVEAU_EXEC * ioctl(). */ #define NOUVEAU_GETPARAM_EXEC_PUSH_MAX 17 /* * NOUVEAU_GETPARAM_VRAM_BAR_SIZE - query bar size * * Query the VRAM BAR size. */ #define NOUVEAU_GETPARAM_VRAM_BAR_SIZE 18 /* * NOUVEAU_GETPARAM_VRAM_USED * * Get remaining VRAM size. */ #define NOUVEAU_GETPARAM_VRAM_USED 19 /* * NOUVEAU_GETPARAM_HAS_VMA_TILEMODE * * Query whether tile mode and PTE kind are accepted with VM allocs or not. */ #define NOUVEAU_GETPARAM_HAS_VMA_TILEMODE 20 struct drm_nouveau_getparam { __u64 param; __u64 value; }; /* * Those are used to support selecting the main engine used on Kepler. * This goes into drm_nouveau_channel_alloc::tt_ctxdma_handle */ #define NOUVEAU_FIFO_ENGINE_GR 0x01 #define NOUVEAU_FIFO_ENGINE_VP 0x02 #define NOUVEAU_FIFO_ENGINE_PPP 0x04 #define NOUVEAU_FIFO_ENGINE_BSP 0x08 #define NOUVEAU_FIFO_ENGINE_CE 0x30 struct drm_nouveau_channel_alloc { __u32 fb_ctxdma_handle; __u32 tt_ctxdma_handle; __s32 channel; __u32 pushbuf_domains; /* Notifier memory */ __u32 notifier_handle; /* DRM-enforced subchannel assignments */ struct { __u32 handle; __u32 grclass; } subchan[8]; __u32 nr_subchan; }; struct drm_nouveau_channel_free { __s32 channel; }; struct drm_nouveau_notifierobj_alloc { __u32 channel; __u32 handle; __u32 size; __u32 offset; }; struct drm_nouveau_gpuobj_free { __s32 channel; __u32 handle; }; #define NOUVEAU_GEM_DOMAIN_CPU (1 << 0) #define NOUVEAU_GEM_DOMAIN_VRAM (1 << 1) #define NOUVEAU_GEM_DOMAIN_GART (1 << 2) #define NOUVEAU_GEM_DOMAIN_MAPPABLE (1 << 3) #define NOUVEAU_GEM_DOMAIN_COHERENT (1 << 4) /* The BO will never be shared via import or export. */ #define NOUVEAU_GEM_DOMAIN_NO_SHARE (1 << 5) #define NOUVEAU_GEM_TILE_COMP 0x00030000 /* nv50-only */ #define NOUVEAU_GEM_TILE_LAYOUT_MASK 0x0000ff00 #define NOUVEAU_GEM_TILE_16BPP 0x00000001 #define NOUVEAU_GEM_TILE_32BPP 0x00000002 #define