0x00190000 ˆÇÆ ƒ ŽµÅ¾ÃŠ/* SPDX-License-Identifier: GPL-2.0 */ /* * Copyright (c) 2018 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * * Exynos - CHIPID support */ #ifndef __LINUX_SOC_EXYNOS_CHIPID_H #define __LINUX_SOC_EXYNOS_CHIPID_H #define EXYNOS_CHIPID_REG_PRO_ID 0x00 #define EXYNOS_SUBREV_MASK (0xf << 4) #define EXYNOS_MAINREV_MASK (0xf << 0) #define EXYNOS_REV_MASK (EXYNOS_SUBREV_MASK | \ EXYNOS_MAINREV_MASK) #define EXYNOS_MASK 0xfffff000 #define EXYNOS_CHIPID_REG_PKG_ID 0x04 /* Bit field definitions for EXYNOS_CHIPID_REG_PKG_ID register */ #define EXYNOS5422_IDS_OFFSET 24 #define EXYNOS5422_IDS_MASK 0xff #define EXYNOS5422_USESG_OFFSET 3 #define EXYNOS5422_USESG_MASK 0x01 #define EXYNOS5422_SG_OFFSET 0 #define EXYNOS5422_SG_MASK 0x07 #define EXYNOS5422_TABLE_OFFSET 8 #define EXYNOS5422_TABLE_MASK 0x03 #define EXYNOS5422_SG_A_OFFSET 17 #define EXYNOS5422_SG_A_MASK 0x0f #define EXYNOS5422_SG_B_OFFSET 21 #define EXYNOS5422_SG_B_MASK 0x03 #define EXYNOS5422_SG_BSIGN_OFFSET 23 #define EXYNOS5422_SG_BSIGN_MASK 0x01 #define EXYNOS5422_BIN2_OFFSET 12 #define EXYNOS5422_BIN2_MASK 0x01 #define EXYNOS_CHIPID_REG_LOT_ID 0x14 #define EXYNOS_CHIPID_REG_AUX_INFO 0x1c /* Bit field definitions for EXYNOS_CHIPID_REG_AUX_INFO register */ #define EXYNOS5422_TMCB_OFFSET 0 #define EXYNOS5422_TMCB_MASK 0x7f #define EXYNOS5422_ARM_UP_OFFSET 8 #define EXYNOS5422_ARM_UP_MASK 0x03 #define EXYNOS5422_ARM_DN_OFFSET 10 #define EXYNOS5422_ARM_DN_MASK 0x03 #define EXYNOS5422_KFC_UP_OFFSET 12 #define EXYNOS5422_KFC_UP_MASK 0x03 #define EXYNOS5422_KFC_DN_OFFSET 14 #define EXYNOS5422_KFC_DN_MASK 0x03 #endif /*__LINUX_SOC_EXYNOS_CHIPID_H */ _’I|¥‰ÓMjqØ‚¦ð¬÷¿ÄFile not found. ˆÈÇ ƒáoÆ¿Ä c/* * BSD LICENSE * * Copyright(c) 2015 Broadcom Corporation. All rights reserved. * * Redistribution and use in source and binary forms, with or without * modification, are permitted provided that the following conditions * are met: * * * Redistributions of source code must retain the above copyright * notice, this list of conditions and the following disclaimer. * * Redistributions in binary form must reproduce the above copyright * notice, this list of conditions and the following disclaimer in * the documentation and/or other materials provided with the * distribution. * * Neither the name of Broadcom Corporation nor the names of its * contributors may be used to endorse or promote products derived * from this software without specific prior written permission. * * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ #ifndef _CLOCK_BCM_NS2_H #define _CLOCK_BCM_NS2_H /* GENPLL SCR clock channel ID */ #define BCM_NS2_GENPLL_SCR 0 #define BCM_NS2_GENPLL_SCR_SCR_CLK 1 #define BCM_NS2_GENPLL_SCR_FS_CLK 2 #define BCM_NS2_GENPLL_SCR_AUDIO_CLK 3 #define BCM_NS2_GENPLL_SCR_CH3_UNUSED 4 #define BCM_NS2_GENPLL_SCR_CH4_UNUSED 5 #define BCM_NS2_GENPLL_SCR_CH5_UNUSED 6 /* GENPLL SW clock channel ID */ #define BCM_NS2_GENPLL_SW 0 #define BCM_NS2_GENPLL_SW_RPE_CLK 1 #define BCM_NS2_GENPLL_SW_250_CLK 2 #define BCM_NS2_GENPLL_SW_NIC_CLK 3 #define BCM_NS2_GENPLL_SW_CHIMP_CLK 4 #define BCM_NS2_GENPLL_SW_PORT_CLK 5 #define BCM_NS2_GENPLL_SW_SDIO_CLK 6 /* LCPLL DDR clock