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  )   €l–Ь4э( ©і( 	ЕЂfаB¦-яБ‚l"_†I|ҐЏ+БА      /* SPDX-License-Identifier: GPL-2.0 */
#ifndef _DRM_SYSFS_H_
#define _DRM_SYSFS_H_

struct drm_device;
struct device;
struct drm_connector;
struct drm_property;

int drm_class_device_register(struct device *dev);
void drm_class_device_unregister(struct device *dev);

void drm_sysfs_hotplug_event(struct drm_device *dev);
void drm_sysfs_connector_hotplug_event(struct drm_connector *connector);
void drm_sysfs_connector_property_event(struct drm_connector *connector,
					struct drm_property *property);
#endif
     €їВ644ѕБА „    /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 *  SR-IPv6 implementation
 *
 *  Authors:
 *  David Lebrun <david.lebrun@uclouvain.be>
 *  eBPF support: Mathieu Xhonneux <m.xhonneux@gmail.com>
 */

#ifndef _NET_SEG6_LOCAL_H
#define _NET_SEG6_LOCAL_H

#include <linux/percpu.h>
#include <linux/net.h>
#include <linux/ipv6.h>

extern int seg6_lookup_nexthop(struct sk_buff *skb, struct in6_addr *nhaddr,
			       u32 tbl_id);
extern bool seg6_bpf_has_valid_srh(struct sk_buff *skb);

struct seg6_bpf_srh_state {
	struct ipv6_sr_hdr *srh;
	u16 hdrlen;
	bool valid;
};

DECLARE_PER_CPU(struct seg6_bpf_srh_state, seg6_bpf_srh_states);

#endif
     €їВ„‚лџѕБА /ђ    /* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * include/linux/mfd/wm831x/auxadc.h -- Auxiliary ADC interface for WM831x
 *
 * Copyright 2009 Wolfson Microelectronics PLC.
 *
 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
 */

#ifndef __MFD_WM831X_AUXADC_H__
#define __MFD_WM831X_AUXADC_H__

struct wm831x;

/*
 * R16429 (0x402D) - AuxADC Data
 */
#define WM831X_AUX_DATA_SRC_MASK                0xF000  /* AUX_DATA_SRC - [15:12] */
#define WM831X_AUX_DATA_SRC_SHIFT                   12  /* AUX_DATA_SRC - [15:12] */
#define WM831X_AUX_DATA_SRC_WIDTH                    4  /* AUX_DATA_SRC - [15:12] */
#define WM831X_AUX_DATA_MASK                    0x0FFF  /* AUX_DATA - [11:0] */
#define WM831X_AUX_DATA_SHIFT                        0  /* AUX_DATA - [11:0] */
#define WM831X_AUX_DATA_WIDTH                       12  /* AUX_DATA - [11:0] */

/*
 * R16430 (0x402E) - AuxADC Control
 */
#define WM831X_AUX_ENA                          0x8000  /* AUX_ENA */
#define WM831X_AUX_ENA_MASK                     0x8000  /* AUX_ENA */
#define WM831X_AUX_ENA_SHIFT                        15  /* AUX_ENA */
#define WM831X_AUX_ENA_WIDTH                         1  /* AUX_ENA */
#define WM831X_AUX_CVT_ENA                      0x4000  /* AUX_CVT_ENA */
#define WM831X_AUX_CVT_ENA_MASK                 0x4000  /* AUX_CVT_ENA */
#define WM831X_AUX_CVT_ENA_SHIFT                    14  /* AUX_CVT_ENA */
#define WM831X_AUX_CVT_ENA_WIDTH                     1  /* AUX_CVT_ENA */
#define WM831X_AUX_SLPENA                       0x1000  /* AUX_SLPENA */
#define WM831X_AUX_SLPENA_MASK                  0x1000  /* AUX_SLPENA */
#define WM831X_AUX_SLPENA_SHIFT                     12  /* AUX_SLPENA */
#define WM831X_AUX_SLPENA_WIDTH                      1  /* AUX_SLPENA */
#define WM831X_AUX_FRC_ENA                      0x0800  /* AUX_FRC_ENA */
#define WM831X_AUX_FRC_ENA_MASK                 0x0800  /* AUX_FRC_ENA */
#define WM831X_AUX_FRC_ENA_SHIFT                    11  /* AUX_FRC_ENA */
#define WM831X_AUX_FRC_ENA_WIDTH                     1  /* AUX_FRC_ENA */
#define WM831X_AUX_RATE_MASK                    0x003F  /* AUX_RATE - [5:0] */
#define WM831X_AUX_RATE_SHIFT                        0  /* AUX_RATE - [5:0] */
#define WM831X_AUX_RATE_WIDTH                        6  /* AUX_RATE - [5:0] */

/*
 * R16431 (0x402F) - AuxADC Source
 */
#define WM831X_AUX_CAL_SEL                      0x8000  /* AUX_CAL_SEL */
#define WM831X_AUX_CAL_SEL_MASK                 0x8000  /* AUX_CAL_SEL */
#define WM831X_AUX_CAL_SEL_SHIFT                    15  /* AUX_CAL_SEL */
#define WM831X_AUX_CAL_SEL_WIDTH                     1  /* AUX_CAL_SEL */
#define WM831X_AUX_BKUP_BATT_SEL                0x0400  /* AUX_BKUP_BATT_SEL */
#define WM831X_AUX_BKUP_BATT_SEL_MASK           0x0400  /* AUX_BKUP_BATT_SEL */
#define WM831