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     5ˆÇÌ„q¿Á¾Ê *Õ    5/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_INTEL_FAMILY_H
#define _ASM_X86_INTEL_FAMILY_H

/*
 * "Big Core" Processors (Branded as Core, Xeon, etc...)
 *
 * While adding a new CPUID for a new microarchitecture, add a new
 * group to keep logically sorted out in chronological order. Within
 * that group keep the CPUID for the variants sorted by model number.
 *
 * The defined symbol names have the following form:
 *	INTEL_FAM6{OPTFAMILY}_{MICROARCH}{OPTDIFF}
 * where:
 * OPTFAMILY	Describes the family of CPUs that this belongs to. Default
 *		is assumed to be "_CORE" (and should be omitted). Other values
 *		currently in use are _ATOM and _XEON_PHI
 * MICROARCH	Is the code name for the micro-architecture for this core.
 *		N.B. Not the platform name.
 * OPTDIFF	If needed, a short string to differentiate by market segment.
 *
 *		Common OPTDIFFs:
 *
 *			- regular client parts
 *		_L	- regular mobile parts
 *		_G	- parts with extra graphics on
 *		_X	- regular server parts
 *		_D	- micro server parts
 *		_N,_P	- other mobile parts
 *		_H	- premium mobile parts
 *		_S	- other client parts
 *
 *		Historical OPTDIFFs:
 *
 *		_EP	- 2 socket server parts
 *		_EX	- 4+ socket server parts
 *
 * The #define line may optionally include a comment including platform or core
 * names. An exception is made for skylake/kabylake where steppings seem to have gotten
 * their own names :-(
 */

#define IFM(_fam, _model)	VFM_MAKE(X86_VENDOR_INTEL, _fam, _model)

/* Wildcard match for FAM6 so X86_MATCH_INTEL_FAM6_MODEL(ANY) works */
#define INTEL_FAM6_ANY			X86_MODEL_ANY
/* Wildcard match for FAM6 so X86_MATCH_VFM(ANY) works */
#define INTEL_ANY			IFM(X86_FAMILY_ANY, X86_MODEL_ANY)

#define INTEL_PENTIUM_PRO		IFM(6, 0x01)

#define INTEL_FAM6_CORE_YONAH		0x0E
#define INTEL_CORE_YONAH		IFM(6, 0x0E)

#define INTEL_FAM6_CORE2_MEROM		0x0F
#define INTEL_CORE2_MEROM		IFM(6, 0x0F)
#define INTEL_FAM6_CORE2_MEROM_L	0x16
#define INTEL_CORE2_MEROM_L		IFM(6, 0x16)
#define INTEL_FAM6_CORE2_PENRYN		0x17
#define INTEL_CORE2_PENRYN		IFM(6, 0x17)
#define INTEL_FAM6_CORE2_DUNNINGTON	0x1D
#define INTEL_CORE2_DUNNINGTON		IFM(6, 0x1D)

#define INTEL_FAM6_NEHALEM		0x1E
#define INTEL_NEHALEM			IFM(6, 0x1E)
#define INTEL_FAM6_NEHALEM_G		0x1F /* Auburndale / Havendale */
#define INTEL_NEHALEM_G			IFM(6, 0x1F) /* Auburndale / Havendale */
#define INTEL_FAM6_NEHALEM_EP		0x1A
#define INTEL_NEHALEM_EP		IFM(6, 0x1A)
#define INTEL_FAM6_NEHALEM_EX		0x2E
#define INTEL_NEHALEM_EX		IFM(6, 0x2E)

#define INTEL_FAM6_WESTMERE		0x25
#define INTEL_WESTMERE			IFM(6, 0x25)
#define INTEL_FAM6_WESTMERE_EP		0x2C
#define INTEL_WESTMERE_EP		IFM(6, 0x2C)
#define INTEL_FAM6_WESTMERE_EX		0x2F
#define INTEL_WESTMERE_EX		IFM(6, 0x2F)

#define INTEL_FAM6_SANDYBRIDGE		0x2A
#define INTEL_SANDYBRIDGE		IFM(6, 0x2A)
#define INTEL_FAM6_SANDYBRIDGE_X	0x2D
#define INTEL_SANDYBRIDGE_X		IFM(6, 0x2D)
#define INTEL_FAM6_IVYBRIDGE		0x3A
#define INTEL_IVYBRIDGE			IFM(6, 0x3A)
#define INTEL_FAM6_IVYBRIDGE_X		0x3E
#define INTEL_IVYBRIDGE_X		IFM(6, 0x3E)

#define INTEL_FAM6_HASWELL		0x3C
#define INTEL_HASWELL			IFM(6, 0x3C)
#define INTEL_FAM6_HASWELL_X		0x3F
#define INTEL_HASWELL_X			IFM(6, 0x3F)
#define INTEL_FAM6_HASWELL_L		0x45
#define INTEL_HASWELL_L			IFM(6, 0x45)
#define INTEL_FAM6_HASWELL_G		0x46
#define INTEL_HASWELL_G			IFM(6, 0x46)

#define INTEL_FAM6_BROADWELL		0x3D
#define INTEL_BROADWELL			IFM(6, 0x3D)
#define INTEL_FAM6_BROADWELL_G		0x47
#define INTEL_BROADWELL_G		IFM(6, 0x47)
#define INTEL_FAM6_BROADWELL_X		0x4F
#define INTEL_BROADWELL_X		IFM(6, 0x4F)
#define INTEL_FAM6_BROADWELL_D		0x56
#define INTEL_BROADWELL_D		IFM(6, 0x56)

#define INTEL_FAM6_SKYLAKE_L		0x4E	/* Sky Lake             */
#define INTEL_SKYLAKE_L			IFM(6, 0x4E) /* Sky Lake */
#define INTEL_FAM6_SKYLAKE		0x5E	/* Sky Lake             */
#define INTEL_SKYLAKE			IFM(6, 0x5E) /* Sky Lake */
#define INTEL_FAM6_SKYLAKE_X		0x55	/* Sky Lake             */
#define INTEL_SKYLAKE_X			IFM(6, 0x55) /* Sky Lake */
/*                 CASCADELAKE_X	0x55	   Sk