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Index of /anon_sym/anon/lib/modules/5.14.0-687.29.1.el9_8.x86_64/source/samples/rpmsg
Index of /anon_sym/anon/lib/modules/5.14.0-687.29.1.el9_8.x86_64/source/samples/rpmsg
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728ÈÁÆ Ø )/* SPDX-License-Identifier: GPL-2.0 */
/*
*pxa168 ethernet platform device data definition file.
*/
#ifndef __LINUX_PXA168_ETH_H
#define __LINUX_PXA168_ETH_H
#include
struct pxa168_eth_platform_data {
int port_number;
int phy_addr;
/*
* If speed is 0, then speed and duplex are autonegotiated.
*/
int speed; /* 0, SPEED_10, SPEED_100 */
int duplex; /* DUPLEX_HALF or DUPLEX_FULL */
phy_interface_t intf;
/*
* Override default RX/TX queue sizes if nonzero.
*/
int rx_queue_size;
int tx_queue_size;
/*
* init callback is used for board specific initialization
* e.g on Aspenite its used to initialize the PHY transceiver.
*/
int (*init)(void);
};
#endif /* __LINUX_PXA168_ETH_H */
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Index of /FSS-OZR/root/lib/modules/5.14.0-687.31.1.el9_8.x86_64/source/samples/ftrace
Index of /FSS-OZR/root/lib/modules/5.14.0-687.31.1.el9_8.x86_64/source/samples/ftrace
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817ÈÁÆ 1 -/* SPDX-License-Identifier: GPL-2.0 */
/* MFD cell driver data for the DS1WM driver
*
* to be defined in the MFD device that is
* using this driver for one of his sub devices
*/
struct ds1wm_driver_data {
int active_high;
int clock_rate;
/* in milliseconds, the amount of time to
* sleep following a reset pulse. Zero
* should work if your bus devices recover
* time respects the 1-wire spec since the
* ds1wm implements the precise timings of
* a reset pulse/presence detect sequence.
*/
unsigned int reset_recover_delay;
/* Say 1 here for big endian Hardware
* (only relevant with bus-shift > 0
*/
bool is_hw_big_endian;
/* left shift of register number to get register address offsett.
* Only 0,1,2 allowed for 8,16 or 32 bit bus width respectively
*/
unsigned int bus_shift;
};
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Index of /anon_sym/anon/usr/lib64/alsa-lib
Index of /anon_sym/anon/usr/lib64/alsa-lib