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  *   ˆl–Ü4ý( ©³( 	Å€fàB¦-ÿÂƒx._†I|¥�+ÂÅ à    /* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
 */

#ifndef _DT_BINDINGS_CLK_GCC_IPQ806X_H
#define _DT_BINDINGS_CLK_GCC_IPQ806X_H

#define AFAB_CLK_SRC				0
#define QDSS_STM_CLK				1
#define SCSS_A_CLK				2
#define SCSS_H_CLK				3
#define AFAB_CORE_CLK				4
#define SCSS_XO_SRC_CLK				5
#define AFAB_EBI1_CH0_A_CLK			6
#define AFAB_EBI1_CH1_A_CLK			7
#define AFAB_AXI_S0_FCLK			8
#define AFAB_AXI_S1_FCLK			9
#define AFAB_AXI_S2_FCLK			10
#define AFAB_AXI_S3_FCLK			11
#define AFAB_AXI_S4_FCLK			12
#define SFAB_CORE_CLK				13
#define SFAB_AXI_S0_FCLK			14
#define SFAB_AXI_S1_FCLK			15
#define SFAB_AXI_S2_FCLK			16
#define SFAB_AXI_S3_FCLK			17
#define SFAB_AXI_S4_FCLK			18
#define SFAB_AXI_S5_FCLK			19
#define SFAB_AHB_S0_FCLK			20
#define SFAB_AHB_S1_FCLK			21
#define SFAB_AHB_S2_FCLK			22
#define SFAB_AHB_S3_FCLK			23
#define SFAB_AHB_S4_FCLK			24
#define SFAB_AHB_S5_FCLK			25
#define SFAB_AHB_S6_FCLK			26
#define SFAB_AHB_S7_FCLK			27
#define QDSS_AT_CLK_SRC				28
#define QDSS_AT_CLK				29
#define QDSS_TRACECLKIN_CLK_SRC			30
#define QDSS_TRACECLKIN_CLK			31
#define QDSS_TSCTR_CLK_SRC			32
#define QDSS_TSCTR_CLK				33
#define SFAB_ADM0_M0_A_CLK			34
#define SFAB_ADM0_M1_A_CLK			35
#define SFAB_ADM0_M2_H_CLK			36
#define ADM0_CLK				37
#define ADM0_PBUS_CLK				38
#define IMEM0_A_CLK				39
#define QDSS_H_CLK				40
#define PCIE_A_CLK				41
#define PCIE_AUX_CLK				42
#define PCIE_H_CLK				43
#define PCIE_PHY_CLK				44
#define SFAB_CLK_SRC				45
#define SFAB_LPASS_Q6_A_CLK			46
#define SFAB_AFAB_M_A_CLK			47
#define AFAB_SFAB_M0_A_CLK			48
#define AFAB_SFAB_M1_A_CLK			49
#define SFAB_SATA_S_H_CLK			50
#define DFAB_CLK_SRC				51
#define DFAB_CLK				52
#define SFAB_DFAB_M_A_CLK			53
#define DFAB_SFAB_M_A_CLK			54
#define DFAB_SWAY0_H_CLK			55
#define DFAB_SWAY1_H_CLK			56
#define DFAB_ARB0_H_CLK				57
#define DFAB_ARB1_H_CLK				58
#define PPSS_H_CLK				59
#define PPSS_PROC_CLK				60
#define PPSS_TIMER0_CLK				61
#define PPSS_TIMER1_CLK				62
#define PMEM_A_CLK				63
#define DMA_BAM_H_CLK				64
#define SIC_H_CLK				65
#define SPS_TIC_H_CLK				66
#define CFPB_2X_CLK_SRC				67
#define CFPB_CLK				68
#define CFPB0_H_CLK				69
#define CFPB1_H_CLK				70
#define CFPB2_H_CLK				71
#define SFAB_CFPB_M_H_CLK			72
#define CFPB_MASTER_H_CLK			73
#define SFAB_CFPB_S_H_CLK			74
#define CFPB_SPLITTER_H_CLK			75
#define TSIF_H_CLK				76
#define TSIF_INACTIVITY_TIMERS_CLK		77
#define TSIF_REF_SRC				78
#define TSIF_REF_CLK				79
#define CE1_H_CLK				80
#define CE1_CORE_CLK				81
#define CE1_SLEEP_CLK				82
#define CE2_H_CLK				83
#define CE2_CORE_CLK				84
#define SFPB_H_CLK_SRC				85
#define SFPB_H_CLK				86
#define SFAB_SFPB_M_H_CLK			87
#define SFAB_SFPB_S_H_CLK			88
#define RPM_PROC_CLK				89
#define RPM_BUS_H_CLK				90
#define RPM_SLEEP_CLK				91
#define RPM_TIMER_CLK				92
#define RPM_MSG_RAM_H_CLK			93
#define PMIC_ARB0_H_CLK				94
#define PMIC_ARB1_H_CLK				95
#define PMIC_SSBI2_SRC				96
#define PMIC_SSBI2_CLK				97
#define SDC1_H_CLK				98
#define SDC2_H_CLK				99
#define SDC3_H_CLK				100
#define SDC4_H_CLK				101
#define SDC1_SRC				102
#define SDC1_CLK				103
#define SDC2_SRC				104
#define SDC2_CLK				105
#define SDC3_SRC				106
#define SDC3_CLK				107
#define SDC4_SRC				108
#define SDC4_CLK				109
#define USB_HS1_H_CLK				110
#define USB_HS1_XCVR_SRC			111
#define USB_HS1_XCVR_CLK			112
#define USB_HSIC_H_CLK				113
#define USB_HSIC_XCVR_SRC			114
#define USB_HSIC_XCVR_CLK			115
#define USB_HSIC_SYSTEM_CLK_SRC			116
#define USB_HSIC_SYSTEM_CLK			117
#define CFPB0_C0_H_CLK				118
#define CFPB0_D0_H_CLK				119
#define CFPB0_C1_H_CLK				120
#define CFPB0_D1_H_CLK				121
#define USB_FS1_H_CLK				122
#define USB_FS1_XCVR_SRC			123
#define USB_FS1_XCVR_CLK			124
#define USB_FS1_SYSTEM_CLK			125
#define GSBI_COMMON_SIM_SRC			126
#define GSBI1_H_CLK				127
#define GSBI2_H_CLK				128
#define GSBI3_H_CLK				129
#define GSBI4_H_CLK				130
#define GSBI5_H_CLK				131
#define GSBI6_H_CLK				132
#define GSBI7_H_CLK				1