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<h1>Index of /FSS-OZR/root/proc/1606995/net/xt_recent</h1>
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      ˆl–ß=¿J	•2ÛB‚ œP@¸Ènå1hßÂ0ÄÅ     �¿ÄÅ      File not found.
  "   ˆl–Ü4ý( ©³( 	Å€fàD¦-ÿÃ297ÅÆ )    # SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_CLK_INTEL_SOCFPGA32) += clk.o clk-gate.o clk-pll.o clk-periph.o \
				     clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o
obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \
				     clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \
				     clk-agilex.o
  9   ˆl–ßi~”êh¥8 Eq—nÅ1hßÄ513a–Ðz¾””ÔD¨ 	Å íÆž¸ÔÅ£È     {
    "sr_version": {
        "major": 1,
        "minor": 1,
        "patch": 1
    },
    "sr_domain": {
        "soc": "msm",
        "domain": "adsp",
        "subdomain": "root_pd",
        "qmi_instance_id": 74
    },
    "sr_service": [
        {
            "provider": "tms",
            "service": "servreg",
            "service_data_valid": 0,
            "service_data": 0,
            "dcomment": "data can be used to configure ACK timeout.Make data_valid 1 as well.Unit is second"
        }
    ]
}      ˆl–ßi~”Je¶…8 �q¦î	•1hßÆ0¿É     ˆÁÆƒeÇ™¿É c    # SPDX-License-Identifier: GPL-2.0
KBUILD_DEFCONFIG := mmu_defconfig

UTS_SYSNAME = -DUTS_SYSNAME=\"Linux\"

# What CPU version are we building for, and crack it open
# as major.minor.rev
CPU_VER   := $(shell echo $(CONFIG_XILINX_MICROBLAZE0_HW_VER))
CPU_MAJOR := $(shell echo $(CPU_VER) | cut -d '.' -f 1)
CPU_MINOR := $(shell echo $(CPU_VER) | cut -d '.' -f 2)
CPU_REV   := $(shell echo $(CPU_VER) | cut -d '.' -f 3)

export CPU_VER CPU_MAJOR CPU_MINOR CPU_REV

# Use cpu-related CONFIG_ vars to set compile options.
# The various CONFIG_XILINX cpu features options are integers 0/1/2...
# rather than bools y/n

# Work out HW multipler support. This is tricky.
# 1. Spartan2 has no HW multipliers.
# 2. MicroBlaze v3.x always uses them, except in Spartan 2
# 3. All other FPGa/CPU ver combos, we can trust the CONFIG_ settings
ifeq (,$(findstring spartan2,$(CONFIG_XILINX_MICROBLAZE0_FAMILY)))
  ifeq ($(CPU_MAJOR),3)
    CPUFLAGS-1 += -mno-xl-soft-mul
  else
    # USE_HW_MUL can be 0, 1, or 2, defining a hierarchy of HW Mul support.
    CPUFLAGS-$(subst 1,,$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL)) += -mxl-multiply-high
    CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_HW_MUL) += -mno-xl-soft-mul
  endif
endif
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_DIV) += -mno-xl-soft-div
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_BARREL) += -mxl-barrel-shift
CPUFLAGS-$(CONFIG_XILINX_MICROBLAZE0_USE_PCMP_INSTR) += -mxl-pattern-compare

ifdef CONFIG_CPU_BIG_ENDIAN
KBUILD_CFLAGS += -mbig-endian
KBUILD_AFLAGS += -mbig-endian
KBUILD_LDFLAGS += -EB
else
KBUILD_CFLAGS += -mlittle-endian
KBUILD_AFLAGS += -mlittle-endian
KBUILD_LDFLAGS += -EL
endif

CPUFLAGS-1 += $(call cc-option,-mcpu=v$(CPU_VER))

# r31 holds current when in kernel mode
KBUILD_CFLAGS += -ffixed-r31 $(CPUFLAGS-y) $(CPUFLAGS-1) $(CPUFLAGS-2)

head-y := arch/microblaze/kernel/head.o
libs-y += arch/microblaze/lib/
core-y += arch/microblaze/kernel/
core-y += arch/microblaze/mm/
core-$(CONFIG_PCI) += arch/microblaze/pci/

boot := arch/mi