device:01  m=_I|Mdv &K Index of /anon_sym/anon/proc/self/root/sys/bus/pci/devices/0000:00:04.0/driver/module

Index of /anon_sym/anon/proc/self/root/sys/bus/pci/devices/0000:00:04.0/driver/module

 NameLast modifiedSizeDescription
 Parent Directory   -  
 drivers/ 2026-10-11 15:20 -  
 parameters/ 2026-10-11 15:20 -  
 uevent 2026-10-11 15:20 4.0K 
 version 2026-10-11 15:20 4.0K 
* l4( (  fB- iZ_I|+  /* SPDX-License-Identifier: MIT */ /* * Copyright © 2023 Intel Corporation */ #ifndef __DRM_ELD_H__ #define __DRM_ELD_H__ #include struct cea_sad; /* ELD Header Block */ #define DRM_ELD_HEADER_BLOCK_SIZE 4 #define DRM_ELD_VER 0 # define DRM_ELD_VER_SHIFT 3 # define DRM_ELD_VER_MASK (0x1f << 3) # define DRM_ELD_VER_CEA861D (2 << 3) /* supports 861D or below */ # define DRM_ELD_VER_CANNED (0x1f << 3) #define DRM_ELD_BASELINE_ELD_LEN 2 /* in dwords! */ /* ELD Baseline Block for ELD_Ver == 2 */ #define DRM_ELD_CEA_EDID_VER_MNL 4 # define DRM_ELD_CEA_EDID_VER_SHIFT 5 # define DRM_ELD_CEA_EDID_VER_MASK (7 << 5) # define DRM_ELD_CEA_EDID_VER_NONE (0 << 5) # define DRM_ELD_CEA_EDID_VER_CEA861 (1 << 5) # define DRM_ELD_CEA_EDID_VER_CEA861A (2 << 5) # define DRM_ELD_CEA_EDID_VER_CEA861BCD (3 << 5) # define DRM_ELD_MNL_SHIFT 0 # define DRM_ELD_MNL_MASK (0x1f << 0) #define DRM_ELD_SAD_COUNT_CONN_TYPE 5 # define DRM_ELD_SAD_COUNT_SHIFT 4 # define DRM_ELD_SAD_COUNT_MASK (0xf << 4) # define DRM_ELD_CONN_TYPE_SHIFT 2 # define DRM_ELD_CONN_TYPE_MASK (3 << 2) # define DRM_ELD_CONN_TYPE_HDMI (0 << 2) # define DRM_ELD_CONN_TYPE_DP (1 << 2) # define DRM_ELD_SUPPORTS_AI (1 << 1) # define DRM_ELD_SUPPORTS_HDCP (1 << 0) #define DRM_ELD_AUD_SYNCH_DELAY 6 /* in units of 2 ms */ # define DRM_ELD_AUD_SYNCH_DELAY_MAX 0xfa /* 500 ms */ #define DRM_ELD_SPEAKER 7 # define DRM_ELD_SPEAKER_MASK 0x7f # define DRM_ELD_SPEAKER_RLRC (1 << 6) # define DRM_ELD_SPEAKER_FLRC (1 << 5) # define DRM_ELD_SPEAKER_RC (1 << 4) # define DRM_ELD_SPEAKER_RLR (1 << 3) # define DRM_ELD_SPEAKER_FC (1 << 2) # define DRM_ELD_SPEAKER_LFE (1 << 1) # define DRM_ELD_SPEAKER_FLR (1 << 0) #define DRM_ELD_PORT_ID 8 /* offsets 8..15 inclusive */ # define DRM_ELD_PORT_ID_LEN 8 #define DRM_ELD_MANUFACTURER_NAME0 16 #define DRM_ELD_MANUFACTURER_NAME1 17 #define DRM_ELD_PRODUCT_CODE0 18 #define DRM_ELD_PRODUCT_CODE1 19 #define DRM_ELD_MONITOR_NAME_STRING 20 /* offsets 20..(20+mnl-1) inclusive */ #define DRM_ELD_CEA_SAD(mnl, sad) (20 + (mnl) + 3 * (sad)) /** * drm_eld_mnl - Get ELD monitor name length in bytes. * @eld: pointer to an eld memory structure with mnl set */ static inline int drm_eld_mnl(const u8 *eld) { return (eld[DRM_ELD_CEA_EDID_VER_MNL] & DRM_ELD_MNL_MASK) >> DRM_ELD_MNL_SHIFT; } int drm_eld_sad_get(const u8 *eld, int sad_index, struct cea_sad *cta_sad); int drm_eld_sad